AT90CAN128-16AE ATMEL Corporation, AT90CAN128-16AE Datasheet - Page 227

• Manufacturer Part Number: AT90CAN128-16AE
• Description: 8-bit Avr Microcontroller With 128K Bytes of Isp Flash And CAN Controller.flash (Kbytes) 128 Vcc (V) 2.7-5.5 EEPROM (Kbytes) 4 SRAM (bytes) 4K CAN (mess. Obj.) 15
• Manufacturer: ATMEL Corporation

Multi-master Systems
and Arbitration
4250C–CAN–03/04
1. The transfer must be initiated
2. The EEPROM must be instructed what location should be read
3. The reading must be performed
4. The transfer must be finished
Note that data is transmitted both from master to slave and vice versa. The master must
instruct the slave what location it wants to read, requiring the use of the MT mode. Sub-
sequently, data must be read from the slave, implying the use of the MR mode. Thus,
the transfer direction must be changed. The master must keep control of the bus during
all these steps, and the steps should be carried out as an atomical operation. If this prin-
ciple is violated in a multimaster system, another master can alter the data pointer in the
EEPROM between steps 2 and 3, and the master will read the wrong data location.
Such a change in transfer direction is accomplished by transmitting a REPEATED
START between the transmission of the address byte and reception of the data. After a
REPEATED START, the master keeps ownership of the bus. The following figure shows
the flow in this transfer.
Figure 105. Combining Several TWI Modes to Access a Serial EEPROM
If multiple masters are connected to the same bus, transmissions may be initiated simul-
taneously by one or more of them. The TWI standard ensures that such situations are
handled in such a way that one of the masters will be allowed to proceed with the trans-
fer, and that no data will be lost in the process. An example of an arbitration situation is
depicted below, where two masters are trying to transmit data to a slave receiver.
Figure 106. An Arbitration Example
Several different scenarios may arise during arbitration, as described below:
•
S
S = START
SDA
SCL
Two or more masters are performing identical communication with the same slave.
In this case, neither the slave nor any of the masters will know about the bus
contention.
Transmitted from master to slave
SLA+W
TRANSMITTER
Device 1
MASTER
A
Master Transmitter
ADDRESS
Device 2
RECEIVER
SLAVE
A
Rs = REPEATED START
Device 3
RECEIVER
Rs
Transmitted from slave to master
SLAVE
SLA+R
........
Device n
AT90CAN128
A
Master Receiver
DATA
R1
V
P = STOP
CC
A
R2
227
P