MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 111

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 E IT
• Manufacturer: Micron

PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
Table 24: Error Management Details (Continued)
Description
Minimum ECC with internal ECC enabled
Minimum required ECC for block 0 if PROGRAM/
ERASE cycles are less than 1000
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
111
Micron Technology, Inc. reserves the right to change products or specifications without notice.
Requirement
4-bit ECC per 516 bytes (user data) + 8
bytes (parity data)
1-bit ECC per 528 bytes
© 2009 Micron Technology, Inc. All rights reserved.
Error Management