MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 90

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 E IT
• Manufacturer: Micron

LOCK TIGHT (2Ch)
Figure 62: LOCK TIGHT Operation
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
The LOCK TIGHT (2Ch) command prevents locked blocks from being unlocked and al-
so prevents unlocked blocks from being locked. When this command is issued, the
UNLOCK (23h) and LOCK (2Ah) commands are disabled. This provides an additional
level of protection against inadvertent PROGRAM and ERASE operations to locked blocks.
To implement LOCK TIGHT in all of the locked blocks in the device, verify that WP# is
HIGH and then issue the LOCK TIGHT (2Ch) command.
When a PROGRAM or ERASE operation is issued to a locked block that has also been
locked tight, R/B# goes LOW for
complete. The READ STATUS (70h) command reports bit 7 as 0, indicating that the
block is protected. PROGRAM and ERASE operations complete successfully to blocks
that were not locked at the time the LOCK TIGHT command was issued.
After the LOCK TIGHT command is issued, the command cannot be disabled via a soft-
ware command. The only ways to disable the lock tight status is to power cycle the
device. When the lock tight status is disabled, all of the blocks become locked, the same
as if the LOCK (2Ah) command had been issued.
The LOCK TIGHT (2Ch) command is disabled if LOCK is LOW at power-on.
LOCK
WP#
WE#
R/B#
I/Ox
CE#
CLE
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
LOCK TIGHT
command
2Ch
90
t
LBSY. The PROGRAM or ERASE operation does not
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Block Lock Feature