MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 187

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 E IT
• Manufacturer: Micron

Figure 123: READ-to-WRITE
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
Command
Command
Address
Address
DQ
DQ
DQS
DQS
CK#
CK#
DM
DM
CK
CK
3,4
3,4
Notes:
READ
Bank,
Col n
READ
Bank,
Col n
T0
T0
1. BL = 4 in the cases shown (applies for bursts of 8 and 16 as well; if BL = 2, the BST com-
2. BST = BURST TERMINATE command; page remains open.
3. D
4. D
5. Shown with nominal
6. CKE = HIGH.
1
1
mand shown can be NOP).
OUT
IN
b = data-in from column b.
n = data-out from column n.
CL = 2
BST
BST
T1
T1
2
2
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
CL = 3
T1n
D
t
AC,
OUT
n
NOP
T2
NOP
T2
187
t
DQSCK, and
D
n + 1
T2n
T2n
OUT
D
OUT
n
WRITE
Micron Technology, Inc. reserves the right to change products or specifications without notice.
NOP
Bank,
Col b
T3
T3
t
DQSQ.
1
D
n + 1
t
(NOM)
OUT
DQSS
T3n
T3n
Don’t Care
WRITE
Bank,
Col b
D
T4
T4
NOP
b
IN
1
t
(NOM)
DQSS
T4n
T4n
D
b+1
IN
Transitioning Data
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READ Operation
D
T5
D
b+2
T5
NOP
NOP
b
IN
IN
b + 1
T5n
D
T5n
b+3
D
IN
IN