MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 182

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 E IT
• Manufacturer: Micron

Figure 118: READ Burst
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
Command
Command
Address
Address
DQS
DQS
CK#
CK#
DQ
DQ
CK
CK
Bank a, Col n
Bank a, Col n
READ
READ
T0
T0
Notes:
command to the same bank cannot be issued until
time is hidden during the access of the last data elements.
1. D
2. BL = 4.
3. Shown with nominal
CL = 2
NOP
NOP
T1
T1
OUT
n = data-out from column n.
CL = 3
T1n
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
D
OUT
NOP
NOP
T2
T2
n1
t
AC,
D
OUT
182
t
T2n
T2n
DQSCK, and
n + 1
D
D
OUT
OUT
NOP
NOP
T3
T3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
n
n + 2
t
DQSQ.
D
OUT
D
T3n
T3n
OUT
n + 1
n + 3
t
RP is met. Part of the row precharge
D
OUT
NOP
NOP
Don’t Care
T4
T4
n + 2
D
© 2009 Micron Technology, Inc. All rights reserved.
OUT
n + 3
READ Operation
Transitioning Data
NOP
NOP
T5
T5