MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 209

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 E IT
• Manufacturer: Micron

Figure 143: Bank Write – Without Auto Precharge
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
Command
BA0, BA1
Address
DQS
DQ
CK#
CKE
A10
DM
CK
6
t
t
IS
IS
NOP
T0
t
t
IH
1
IH
Notes:
t
IS
t
ACTIVE
Bank x
IS
Row
Row
T1
t
t
IH
IH
t
CK
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 in the case shown.
3. PRE = PRECHARGE.
4. Disable auto precharge.
5. Bank x at T8 is “Don’t Care” if A10 is HIGH at T8.
6. D
these times.
t
OUT
t
RCD
RAS
NOP
n = data-out from column n.
T2
1
t
CH
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
t
CL
t
WRITE
Bank x
Note 4
IS
t
Col n
WPRES
T3
t
t
IH
DQSS (NOM)
2
209
t
DS
NOP
T4
D
t
b
DH
IN
t
WPRE
1
T4n
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t
DQSL
NOP
T5
t
1
DQSH
T5n
t
WPST
NOP
T6
1
Don’t Care
© 2009 Micron Technology, Inc. All rights reserved.
Auto Precharge
t
NOP
WR
T7
1
Transitioning Data
One bank
All banks
Bank x
T8
PRE
3
5
t
RP