MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 136

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MT29C4G48MAZAPAKD-5 E IT

Manufacturer Part Number
MT29C4G48MAZAPAKD-5 E IT
Description
Manufacturer
Micron
Datasheet
Functional Block Diagrams
Figure 102: Functional Block Diagram (x16)
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
BA0, BA1
Address
CAS#
RAS#
WE#
CKE
CK#
CS#
CK
Address
register
Standard mode
Extended mode
register
register
Control
logic
counter
Refresh
address
Row-
2
2
Mux
Column-
counter/
address
control
Bank
logic
latch
decoder
address
Bank 0
latch
row-
and
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
1
Sense amplifiers
DM mask logic
I/O gating
Column
decoder
memory
Bank 0
array
136
Bank 1
Bank 2
Bank 3
Micron Technology, Inc. reserves the right to change products or specifications without notice.
32
32
32
Read
latch
out
CK
CK
drivers
Write
FIFO
and
16
16
CK
Functional Block Diagrams
in
MUX
COL 0
Mask
Data
COL 0
32
4
CK
2
2
16
16
generator
DQS
registers
16
Input
© 2009 Micron Technology, Inc. All rights reserved.
Data
2
2
16
16
2
2
16
DQS
DRVRS
2
RCVRS
DQ[15:0]
UDQS
LDM,
UDM
LDQS,

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