MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 122

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 E IT
• Manufacturer: Micron

Asynchronous Interface Timing Diagrams
Figure 83: RESET Operation
Figure 84: READ STATUS Cycle
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
I/O[7:0]
I/O[7:0]
WE#
R/B#
CE#
CLE
WE#
CE#
RE#
CLE
command
RESET
FFh
t WB
t WP
t CS
t CLS
t DS
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
70h
t RST
t DH
t CLH
t CH
122
t WHR
Asynchronous Interface Timing Diagrams
t CLR
Micron Technology, Inc. reserves the right to change products or specifications without notice.
t IR
t CEA
t RP
t REA
t COH
output
Status
t RHOH
t RHZ
© 2009 Micron Technology, Inc. All rights reserved.
t CHZ
Don’t Care