MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 162

no-image

MT29C4G48MAZAPAKD-5 E IT

Manufacturer Part Number
MT29C4G48MAZAPAKD-5 E IT
Description
Manufacturer
Micron
Datasheet
SELF REFRESH
DEEP POWER-DOWN
Figure 109: DEEP POWER-DOWN Command
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
The SELF REFRESH command is used to place the device in self refresh mode; self re-
fresh mode is used to retain data in the memory device while the rest of the system is
powered down. When in self refresh mode, the device retains data without external clock-
ing. The SELF REFRESH command is initiated like an AUTO REFRESH command,
except that CKE is disabled (LOW). After the SELF REFRESH command is registered, all
inputs to the device become “Don’t Care” with the exception of CKE, which must re-
main LOW.
Micron recommends that, prior to self refresh entry and immediately upon self refresh
exit, the user perform a burst auto refresh cycle for the number of refresh rows. Alterna-
tively, if a distributed refresh pattern is used, this pattern should be immediately
resumed upon self refresh exit.
The DEEP POWER-DOWN (DPD) command is used to enter DPD mode, which ach-
ieves maximum power reduction by eliminating the power to the memory array. Data
will not be retained when the device enters DPD mode. The DPD command is the same
as a BURST TERMINATE command with CKE LOW.
BA0, BA1
Address
RAS#
CAS#
WE#
CK#
CKE
CS#
CK
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
Don’t Care
162
Micron Technology, Inc. reserves the right to change products or specifications without notice.
© 2009 Micron Technology, Inc. All rights reserved.
Commands

Related parts for MT29C4G48MAZAPAKD-5 E IT