MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 4

• Manufacturer Part Number: MT29C4G48MAZAPAKD-5 E IT
• Manufacturer: Micron

Erase Operations ............................................................................................................................................ 80
Internal Data Move Operations ....................................................................................................................... 82
Block Lock Feature ......................................................................................................................................... 86
One-Time Programmable (OTP) Operations .................................................................................................... 93
Two-Plane Operations ................................................................................................................................... 100
Interleaved Die (Multi-LUN) Operations ........................................................................................................ 109
Error Management ........................................................................................................................................ 110
Internal ECC and Spare Area Mapping for ECC ............................................................................................... 112
Electrical Specifications ................................................................................................................................. 114
Electrical Specifications – DC Characteristics and Operating Conditions ......................................................... 116
Electrical Specifications – AC Characteristics and Operating Conditions .......................................................... 118
Electrical Specifications – Program/Erase Characteristics ................................................................................ 121
Asynchronous Interface Timing Diagrams ...................................................................................................... 122
2Gb: x16, x32 Mobile LPDDR SDRAM ............................................................................................................. 134
Functional Block Diagrams ............................................................................................................................ 136
Electrical Specifications ................................................................................................................................. 138
Electrical Specifications – I
Electrical Specifications – AC Operating Conditions ........................................................................................ 147
Output Drive Characteristics .......................................................................................................................... 152
Functional Description .................................................................................................................................. 155
Commands ................................................................................................................................................... 156
Truth Tables .................................................................................................................................................. 163
State Diagram ............................................................................................................................................... 168
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
ERASE BLOCK (60h-D0h) ............................................................................................................................ 80
ERASE BLOCK TWO-PLANE (60h-D1h) ....................................................................................................... 81
READ FOR INTERNAL DATA MOVE (00h-35h) ............................................................................................ 83
PROGRAM FOR INTERNAL DATA MOVE (85h–10h) .................................................................................... 84
PROGRAM FOR INTERNAL DATA MOVE TWO-PLANE (85h-11h) ................................................................ 85
WP# and Block Lock ................................................................................................................................... 86
UNLOCK (23h-24h) .................................................................................................................................... 86
LOCK (2Ah) ................................................................................................................................................ 89
LOCK TIGHT (2Ch) ..................................................................................................................................... 90
BLOCK LOCK READ STATUS (7Ah) ............................................................................................................. 91
Legacy OTP Commands .............................................................................................................................. 93
OTP DATA PROGRAM (80h-10h) ................................................................................................................. 94
RANDOM DATA INPUT (85h) .................................................................................................................... 95
OTP DATA PROTECT (80h-10) .................................................................................................................... 96
OTP DATA READ (00h-30h) ........................................................................................................................ 98
Two-Plane Addressing ............................................................................................................................... 100
Features .................................................................................................................................................... 134
General Description .................................................................................................................................. 135
DESELECT ............................................................................................................................................... 157
NO OPERATION ....................................................................................................................................... 157
LOAD MODE REGISTER ........................................................................................................................... 157
ACTIVE .................................................................................................................................................... 157
READ ....................................................................................................................................................... 158
WRITE ..................................................................................................................................................... 159
PRECHARGE ............................................................................................................................................ 160
BURST TERMINATE ................................................................................................................................. 161
AUTO REFRESH ....................................................................................................................................... 161
SELF REFRESH .......................................................................................................................................... 162
DEEP POWER-DOWN ............................................................................................................................... 162
DD
Parameters ....................................................................................................... 141
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
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