MT29C4G48MAZAPAKD-5 E IT Micron, MT29C4G48MAZAPAKD-5 E IT Datasheet - Page 208

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MT29C4G48MAZAPAKD-5 E IT

Manufacturer Part Number
MT29C4G48MAZAPAKD-5 E IT
Description
Manufacturer
Micron
Datasheet
Figure 142: Bank Write – With Auto Precharge
PDF: 09005aef83ba4387
168ball_nand_lpddr_j42p_j4z2_j4z3_omap.pdf – Rev. H 3/11
Command
BA0, BA1
Address
DQS
DQ
CK#
CKE
A10
DM
CK
1
t
t
IS
IS
NOP
T0
t
4
t
IH
IH
Notes:
t
t
IS
ACTIVE
IS
Bank x
Row
Row
T1
t
IH
t
IH
t
1. NOP commands are shown for ease of illustration; other commands may be valid at
2. BL = 4 in the case shown.
3. Enable auto precharge.
4. D
CK
these times.
t
IN
t
RCD
RAS
n = data-out from column n.
NOP
T2
4
t
CH
168-Ball NAND Flash and LPDDR PoP (TI OMAP) MCP
t
CL
t
t
WRITE
WPRES
Bank x
IS
Col n
T3
Note 3
t
t
IH
DQSS (NOM)
2
208
t
DS
NOP
T4
D
b
IN
t
WPRE
4
t
DH
Micron Technology, Inc. reserves the right to change products or specifications without notice.
T4n
t
DQSL
NOP
T5
t
4
DQSH
T5n
t
WPST
NOP
T6
4
Don’t Care
© 2009 Micron Technology, Inc. All rights reserved.
Auto Precharge
t
WR
NOP
T7
4
Transitioning Data
NOP
T8
4
t
RP

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