QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 111

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QG82945GSE S LB2R

Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
Host Bridge Device 0 - Configuration Registers (D0:F0)
Datasheet
34:32
31:29
27:24
23:16
15:8
7:0
Bit
28
Access
RO
RO
RO
RO
RO
RO
RO
Default
Value
09h
00h
09h
N/A
N/A
0b
1h
DDR2 Frequency Capability:
010:(G)MCH capable of up to DDR2-667
011:(G)MCH capable of up to DDR2-533
100:(G)MCH capable of DDR2-400
Others: Reserved
This field controls which values may be written to the Memory
Frequency Select field 6:4 of the Clocking Configuration
register (MCHBAR Offset C00h). Any attempt to write an
unsupported value will be ignored.
FSB Capability:
011:(G)MCH capable of up to FSB 667
100: (G)MCH capable of up to FSB 533
Others: Reserved
These values are determined by the BSEL [2:0] frequency
straps. Any unsupported straps will render the (G)MCH host
interface inoperable.
Reserved
CAPID Version:
This field has the value 0001b to identify the first revision of
the CAPID register definition.
CAPID Length:
This field has the value 09h to indicate the structure length (9
bytes).
Next Capability Pointer:
This field is hardwired to 00h indicating the end of the
capabilities linked list.
CAP_ID:
This field has the value 1001b to identify the CAP_ID assigned
by the PCI SIG for vendor dependent capability pointers.
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Description
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