QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 264

no-image

QG82945GSE S LB2R

Manufacturer Part Number
QG82945GSE S LB2R
Description
GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
Manufacturer
Intel
Datasheet
7.2.1
7.2.2
264
VCECH - Virtual Channel Enhanced Capability Header
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register indicates PCI Express device Virtual Channel capabilities.
PVCCAP1 - Port VC Capability Register 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
Describes the configuration of PCI Express Virtual Channels associated with this port.
31:20
19:16
15:0
31:7
6:4
2:0
Bit
Bit
3
Access
Access
R/WO
RO
RO
RO
RO
RO
RO
Default
0000000h
Value
0002h
Default
140h
Value
000b
001b
1h
0b
Pointer to Next Capability (PNC):
The Link Declaration Capability is the next in the PCI Express*
extended capabilities list.
PCI Express Virtual Channel Capability Version
(PCIEVCCV):
Hardwired to 1 to indicate compliances with the current PCI Local
Bus Specification.
Extended Capability ID (ECID):
Value of 0002 h identifies this linked list item (capability
structure) as being for PCI Express Virtual Channel registers.
Reserved
Low Priority Extended VC Count (LPEVCC):
Indicates the number of (extended) Virtual Channels in addition
to the default VC belonging to the low-priority VC (LPVC) group
that has the lowest priority with respect to other VC resources
in a strict-priority VC Arbitration.
The value of 0 in this field implies strict VC arbitration.
Reserved
Extended VC Count (EVCC):
Indicates the number of (extended) Virtual Channels in addition
to the default VC supported by the device.
PCI Express Graphics Device 1 Configuration Registers (D1:F0)
0/1/0/MMR
100-103h
14010002h
RO
32 bits
0/1/0/MMR
104-107h
00000001h
R/WO; RO
32 bits
Description
Description
Datasheet

Related parts for QG82945GSE S LB2R