QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 362

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

Table 36.
10.3.2.3
362
SDVOC_GREEN
SDVOC_BLUE#
SDVOC_BLUE
SDVOC_CLKN
SDVOC_CLKP
SDVO_TVCLKIN#
SDVO_TVCLKIN
SDVOB_INT#
SDVOB_INT
SDVO_FLDSTALL#
SDVO_FLDSTALL
SDVOC_INT#
SDVOC_INT
SDVO Signal
Configuration-wise Mapping of SDVO Signals on the PCIe Interface (Sheet 2
of 2)
NOTE: Slot reversal is not supported on Intel 945GMS/GU/GSE Express Chipset. Only Signals
SDVO Modes
The port can be dynamically configured in several modes:
Standard – Baseline SDVO functionality. Supports Pixel Rates between 25 and
200 MP/s. Utilizes three data pairs to transfer RGB data.
Dual Standard – Utilizes Standard data streams across both SDVO B and SDVO C. Both
channels can only run in Standard mode (3 data pairs) and each channel supports Pixel
Rates between 25 and 200 MP/s. There are two types of dual standard modes:
— Dual Independent Standard - In Dual Independent Standard mode, each SDVO
— Dual Simultaneous Standard - In Dual Simultaneous Standard mode, both
highlighted in
that on the Intel® 945GU Express Chipset, SDVO_FLDSTALL#/SDVO/FLDSTALL are
referred to as SDVO_FLDSTALLN/SDVO/FLDSTALLP.
SDVO Only – Normal
channel will see a different pixel stream. The data stream across SDVO B will
not be the same as the data stream across SDVO C.
SDVO channels will see the same pixel stream. The data stream across SDVO B
will be the same as the data stream across SDVO C. The display timings will be
identical, but the transfer timings may not be - i.e., SDVO B Clocks and Data
may not be perfectly aligned with SDVO C Clock and Data as seen at the SDVO
device(s). Since this utilizes just a single data stream, it utilizes a single pixel
pipeline within the (G)MCH.
EXP_TXN6
EXP_TXN7
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN5
EXP_TXP5
EXP_TXP6
EXP_TXP7
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP5
(3)
BROWN
are applicable to the Intel 945GMS/GU/GSE Express Chipset. Note
Configuration-wise Mapping
Reversed (4)
SDVO Only –
EXP_RXN15
EXP_RXN14
EXP_RXN13
EXP_RXN10
EXP_RXP15
EXP_RXP14
EXP_RXP13
EXP_RXP10
EXP_TXP10
EXP_TXN9
EXP_TXN8
EXP_TXP9
EXP_TXP8
SDVO and PCIe
– Normal (5)
Concurrent
EXP_RXN15
EXP_RXN14
EXP_RXN13
EXP_RXN10
EXP_TXP10
EXP_RXP15
EXP_RXP14
EXP_RXP13
EXP_RXP10
EXP_TXN9
EXP_TXN8
EXP_TXP9
EXP_TXP8
Functional Description
Concurrent SDVO
Reversed (6)
and PCIe* –
EXP_TXN6
EXP_RXN0
EXP_RXN1
EXP_RXN2
EXP_RXN5
EXP_TXN7
EXP_RXP0
EXP_RXP1
EXP_RXP2
EXP_RXP5
EXP_TXP5
EXP_TXP6
EXP_TXP7
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