QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 124

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

6.2.13
124
C0DRT0 - Channel 0 DRAM Timing Register 0
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This 32-bit register defines the timing parameters for all devices in this channel. The
BIOS programs this register with the “least common denominator” values for each
channel after reading configuration registers of each device in each channel.
5:4
3:2
1:0
Bit
Access
R/W
R/W
R/W
Default
Value
00b
00b
00b
Rank 2 Bank Architecture:
00: 4 Bank
01: 8 Bank
1X: Reserved
Rank 1 Bank Architecture:
00: 4 Bank
01: 8 Bank
1X: Reserved
Rank 0 Bank Architecture:
00: 4 Bank
01: 8 Bank
1X: Reserved
0/0/0/MCHBAR
110-113h
B96038F8h
R/W; RO
32 bits
Description
Device 0 Memory Mapped I/O Register
Datasheet