QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 370

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

10.4.1.6.15 Stencil Buffer
10.4.1.6.16 2D Engine
10.4.1.6.17 Mobile Intel 945GM/GME and Intel 945GT Express Chipset VGA Registers
10.4.1.6.18 Logical 128-Bit Fixed BLT and 256 Fill Engine
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Typical applications for entertainment or visual simulations with exterior scenes require
far/near ratios of 1000 to 10000. At 1000, 98% of the range is spent on the first 2% of
the depth. This can cause hidden surface artifacts in distant objects, especially when
using 16-bit depth buffers. A 24-bit Z-buffer provides 16 million Z-values, as opposed
to only 64 K with a 16-bit Z buffer.
The Raster Engine will provide 8-bit stencil buffer storage in 32-bit mode and the ability
to perform stencil testing. Stencil testing controls 3D drawing on a per pixel basis,
conditionally eliminating a pixel on the outcome of a comparison between a stencil
reference value and the value in the stencil buffer at the location of the source pixel
being processed. They are typically used in multipass algorithms to achieve special
effects, such as decals, outlining, shadows and constructive solid geometry rendering.
The (G)MCH contains BLT functionality, and an extensive set of 2D instructions. To take
advantage of the 3D drawing engine’s functionality, some BLT functions such as Alpha
BLTs, arithmetic (bilinear) stretch BLTs, rotations, transposing pixel maps, limited color
space conversion, and DIBs make use of the 3D renderer.
The 2D registers are a combination of registers for the original the Video Graphics
Array (VGA) and others that Intel has added to support graphics modes that have color
depths, resolutions, and hardware acceleration features that go beyond the original
VGA standard.
Use of this BLT engine accelerates the Graphical User Interface (GUI) of Microsoft
Windows* operating systems. The 128-bit (G)MCH BLT Engine provides hardware
acceleration of block transfers of pixel data for many common Windows operations. The
term BLT refers to a block transfer of pixel data between memory locations. The BLT
engine can be used for the following:
The rectangular block of data does not change as it is transferred between memory
locations. The allowable memory transfers are between: cacheable system memory
and frame buffer memory, frame buffer memory and frame buffer memory, and within
system memory. Data to be transferred can consist of regions of memory, patterns, or
solid color fills. A pattern will always be 8x8 pixels wide and may be 8, 16, or 32 bits
per pixel.
The Mobile Intel 945GM/GME/GMS/GU/GSE, 943/940GML and Intel 945GT Express
Chipset BLT engine has the ability to expand monochrome data into a color depth of 8,
16, or 32 bits. BLTs can be either opaque or transparent. Opaque transfers move the
data specified to the destination. Transparent transfers compare destination color to
source color and write according to the mode of transparency selected.
Data is horizontally and vertically aligned at the destination. If the destination for the
BLT overlaps with the source memory location, the (G)MCH can specify which area in
memory to begin the BLT transfer. Hardware is included for all 256 raster operations
(Source, Pattern, and Destination) defined by Microsoft, including transparent BLT.
• Move rectangular blocks of data between memory locations
• Data Alignment
• Perform logical operations (raster ops)
Functional Description
Datasheet