QG82945GSE S LB2R Intel, QG82945GSE S LB2R Datasheet - Page 210

• Manufacturer Part Number: QG82945GSE S LB2R
• Description: GRAPHICS AND MEM CNTRL HUB; No. of Pins: 998; Package / Case: FCBGA; Interface Type: PCI, SATA, USB
• Manufacturer: Intel

6.6.14
6.6.15
210
DMILSTS - DMI Link Status
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register indicates DMI status.
DMICTL1 – DMI Control 1
B/D/F/Type:
Address Offset:
Default Value:
Access:
Size:
This register must be accessed with DWORD granularity and not with BYTE granularity.
15:10
1:0
9:4
3:0
Bit
Bit
Access
Access
R/W
RO
RO
RO
Default
Default
Value
Value
00b
00h
00h
1h
Active State Power Management Support (ASPMS):
Controls the level of active state power management supported
on the given link.
Reserved
Negotiated Width (NWID):
Indicates negotiated link width. This field is valid only when
the link is in the L0, L0s, or L1 states (after link width
negotiation is successfully completed).
All other encodings are reserved.
Negotiated Speed (NSPD):
Indicates negotiated link speed.
All other encodings are reserved.
00:
01:
10:
11:
00h:Reserved
01h:Reserved
02h:X2
04h:X4
1h:
0/0/0/DMIBAR
8A-8Bh
0001h
RO
16 bits
0/0/0/DMIBAR
F0-F3h
00010000h
R/W; RO; R/W/SC;
32 bits
Disabled
L0s Entry Supported
Reserved
L0s and L1 Entry Supported
2.5 Gb/s
Description
Description
Device 0 Memory Mapped I/O Register
Datasheet