C8051F226DK Silicon Laboratories Inc, C8051F226DK Datasheet - Page 126

DEV KIT F220/221/226/230/231/236

C8051F226DK

Manufacturer Part Number
C8051F226DK
Description
DEV KIT F220/221/226/230/231/236
Manufacturer
Silicon Laboratories Inc
Type
MCUr
Datasheet

Specifications of C8051F226DK

Contents
Evaluation Board, Power Supply, USB Cables, Adapter and Documentation
Processor To Be Evaluated
C8051F22x and C8051F23x
Interface Type
USB
Silicon Manufacturer
Silicon Labs
Core Architecture
8051
Silicon Core Number
C8051F226
Silicon Family Name
C8051F2xx
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
For Use With/related Products
C8051F220, 221, 226, 230, 231, 236
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
336-1241
C8051F2xx
Setting TR0 does not reset the timer register. The timer register should be initialized to the desired value
before enabling the timer.
TL1 and TH1 form the 13-bit register for Timer 1 in the same manner as described above for TL0 and TH0.
Timer 1 is configured and controlled using the relevant TCON and TMOD bits just as with Timer 0.
17.1.2. Mode 1: 16-bit Counter/Timer
Mode 1 operation is the same as Mode 0, except that the counter/timer registers use all 16 bits. The coun-
ter/timers are enabled and configured in Mode 1 in the same manner as for Mode 0.
126
X = Don’t Care
TR0
SYSCLK
0
1
1
1
/INT0
T0
GATE0
GATE0
TR0
PORT0
X
0
1
1
MUX
PORT0
MUX
12
0
1
/INT0
Figure 17.1. T0 Mode 0 Block Diagram
X
X
0
1
CKCON
M
T
2
1
0
M
T
1
Disabled
Enabled
Disabled
Enabled
M
T
0
Counter/Timer
G
A
T
E
1
Rev. 1.6
C
T
1
/
M
T
1
1
TMOD
M
T
1
0
TCLK
G
A
T
E
0
C
T
0
/
M
T
0
1
M
T
0
0
(5 bits)
TL0
(8 bits)
TH0
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Interrupt

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