EVB9S08DZ60 Freescale Semiconductor, EVB9S08DZ60 Datasheet - Page 15
![BOARD EVAL FOR 9S08DZ60](/photos/9/23/92371/evb9s08dz60_sml.jpg)
EVB9S08DZ60
Manufacturer Part Number
EVB9S08DZ60
Description
BOARD EVAL FOR 9S08DZ60
Manufacturer
Freescale Semiconductor
Type
MCUr
Datasheets
1.DEMO9S08DZ60.pdf
(416 pages)
2.EVB9S08DZ60.pdf
(2 pages)
3.EVB9S08DZ60.pdf
(32 pages)
4.EVB9S08DZ60.pdf
(13 pages)
5.EVB9S08DZ60.pdf
(4 pages)
Specifications of EVB9S08DZ60
Contents
Module and Misc Hardware
Processor To Be Evaluated
S08D
Data Bus Width
8 bit
Interface Type
RS-232, USB
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08D
Kit Contents
Board Cables CD Power Supply
Rohs Compliant
Yes
For Use With/related Products
MC9S08DZ60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
EVB9S08DZ60
Manufacturer:
TI
Quantity:
101
- DEMO9S08DZ60 PDF datasheet
- EVB9S08DZ60 PDF datasheet #2
- EVB9S08DZ60 PDF datasheet #3
- EVB9S08DZ60 PDF datasheet #4
- EVB9S08DZ60 PDF datasheet #5
- Current page: 15 of 416
- Download datasheet (5Mb)
Section Number
12.4 Programmer’s Model of Message Storage .....................................................................................241
12.5 Functional Description ...................................................................................................................250
12.6 Initialization/Application Information ...........................................................................................270
13.1 Introduction ....................................................................................................................................273
13.2 External Signal Description ...........................................................................................................278
13.3 Modes of Operation........................................................................................................................279
13.4 Register Definition .........................................................................................................................279
13.5 Functional Description ...................................................................................................................284
Freescale Semiconductor
12.3.14MSCAN Transmit Error Counter (CANTXERR) ..........................................................239
12.3.15MSCAN Identifier Acceptance Registers (CANIDAR0-7) ............................................239
12.3.16MSCAN Identifier Mask Registers (CANIDMR0–CANIDMR7) .................................240
12.4.1 Identifier Registers (IDR0–IDR3) ...................................................................................244
12.4.2 IDR0–IDR3 for Standard Identifier Mapping .................................................................246
12.4.3 Data Segment Registers (DSR0-7) .................................................................................247
12.4.4 Data Length Register (DLR) ...........................................................................................248
12.4.5 Transmit Buffer Priority Register (TBPR) ......................................................................249
12.4.6 Time Stamp Register (TSRH–TSRL) .............................................................................249
12.5.1 General ............................................................................................................................250
12.5.2 Message Storage .............................................................................................................251
12.5.3 Identifier Acceptance Filter .............................................................................................254
12.5.4 Modes of Operation ........................................................................................................261
12.5.5 Low-Power Options ........................................................................................................262
12.5.6 Reset Initialization ..........................................................................................................268
12.5.7 Interrupts .........................................................................................................................268
12.6.1 MSCAN initialization .....................................................................................................270
12.6.2 Bus-Off Recovery ...........................................................................................................271
13.1.1 Features ...........................................................................................................................275
13.1.2 Block Diagrams ..............................................................................................................275
13.1.3 SPI Baud Rate Generation ..............................................................................................277
13.2.1 SPSCK — SPI Serial Clock ............................................................................................278
13.2.2 MOSI — Master Data Out, Slave Data In ......................................................................278
13.2.3 MISO — Master Data In, Slave Data Out ......................................................................278
13.2.4 SS — Slave Select ...........................................................................................................278
13.3.1 SPI in Stop Modes ..........................................................................................................279
13.4.1 SPI Control Register 1 (SPIC1) ......................................................................................279
13.4.2 SPI Control Register 2 (SPIC2) ......................................................................................280
13.4.3 SPI Baud Rate Register (SPIBR) ....................................................................................281
13.4.4 SPI Status Register (SPIS) ..............................................................................................282
13.4.5 SPI Data Register (SPID) ................................................................................................283
Serial Peripheral Interface (S08SPIV3)
MC9S08DZ60 Series Data Sheet, Rev. 4
Chapter 13
Title
Page
15
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