EVB9S08DZ60 Freescale Semiconductor, EVB9S08DZ60 Datasheet - Page 17

BOARD EVAL FOR 9S08DZ60

EVB9S08DZ60

Manufacturer Part Number
EVB9S08DZ60
Description
BOARD EVAL FOR 9S08DZ60
Manufacturer
Freescale Semiconductor
Type
MCUr

Specifications of EVB9S08DZ60

Contents
Module and Misc Hardware
Processor To Be Evaluated
S08D
Data Bus Width
8 bit
Interface Type
RS-232, USB
Silicon Manufacturer
Freescale
Core Architecture
HCS08
Core Sub-architecture
HCS08
Silicon Core Number
MC9S08
Silicon Family Name
S08D
Kit Contents
Board Cables CD Power Supply
Rohs Compliant
Yes
For Use With/related Products
MC9S08DZ60
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EVB9S08DZ60
Manufacturer:
TI
Quantity:
101
Section Number
16.1 Introduction ....................................................................................................................................319
16.2 Signal Description ..........................................................................................................................324
16.3 Register Definition .........................................................................................................................328
16.4 Functional Description ...................................................................................................................334
16.5 Reset Overview ..............................................................................................................................340
16.6 Interrupts ........................................................................................................................................340
16.7 The Differences from TPM v2 to TPM v3.....................................................................................342
17.1 Introduction ....................................................................................................................................347
17.2 Background Debug Controller (BDC) ...........................................................................................348
17.3 On-Chip Debug System (DBG) .....................................................................................................357
Freescale Semiconductor
16.1.1 Features ...........................................................................................................................321
16.1.2 Modes of Operation ........................................................................................................321
16.1.3 Block Diagram ................................................................................................................322
16.2.1 Detailed Signal Descriptions ...........................................................................................324
16.3.1 TPM Status and Control Register (TPMxSC) ................................................................328
16.3.2 TPM-Counter Registers (TPMxCNTH:TPMxCNTL) ....................................................329
16.3.3 TPM Counter Modulo Registers (TPMxMODH:TPMxMODL) ....................................330
16.3.4 TPM Channel n Status and Control Register (TPMxCnSC) ..........................................331
16.3.5 TPM Channel Value Registers (TPMxCnVH:TPMxCnVL) ..........................................333
16.4.1 Counter ............................................................................................................................335
16.4.2 Channel Mode Selection .................................................................................................337
16.5.1 General ............................................................................................................................340
16.5.2 Description of Reset Operation .......................................................................................340
16.6.1 General ............................................................................................................................340
16.6.2 Description of Interrupt Operation ..................................................................................341
17.1.1 Forcing Active Background ............................................................................................347
17.1.2 Features ...........................................................................................................................348
17.2.1 BKGD Pin Description ...................................................................................................349
17.2.2 Communication Details ..................................................................................................350
17.2.3 BDC Commands .............................................................................................................354
17.2.4 BDC Hardware Breakpoint .............................................................................................356
17.3.1 Comparators A and B ......................................................................................................357
17.3.2 Bus Capture Information and FIFO Operation ...............................................................357
17.3.3 Change-of-Flow Information ..........................................................................................358
17.3.4 Tag vs. Force Breakpoints and Triggers .........................................................................358
17.3.5 Trigger Modes .................................................................................................................359
17.3.6 Hardware Breakpoints ....................................................................................................361
Timer Pulse-Width Modulator (S08TPMV3)
MC9S08DZ60 Series Data Sheet, Rev. 4
Development Support
Chapter 16
Chapter 17
Title
Page
17

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