EVB9S08DZ60 Freescale Semiconductor, EVB9S08DZ60 Datasheet - Page 372

• Manufacturer Part Number: EVB9S08DZ60
• Description: BOARD EVAL FOR 9S08DZ60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of EVB9S08DZ60

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: S08D
• Data Bus Width: 8 bit
• Interface Type: RS-232, USB
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08D
• Kit Contents: Board Cables CD Power Supply
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08DZ60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Appendix A Electrical Characteristics
where K is a constant pertaining to the particular part. K can be determined from equation 3 by measuring
P
solving equations 1 and 2 iteratively for any value of T
A.5
Although damage from electrostatic discharge (ESD) is much less common on these devices than on early
CMOS circuits, normal handling precautions should be used to avoid exposure to static discharge.
Qualification tests are performed to ensure that these devices can withstand exposure to reasonable levels
of static without suffering any permanent damage.
All ESD testing is in conformity with AEC-Q100 Stress Test Qualification for Automotive Grade
Integrated Circuits. During the device qualification ESD stresses were performed for the Human Body
Model (HBM) and the Charge Device Model (CDM).
A device is defined as a failure if after exposure to ESD pulses the device no longer meets the device
specification. Complete DC parametric and functional testing is performed per the applicable device
specification at room temperature followed by hot temperature, unless specified otherwise in the device
specification.
372
D
(at equilibrium) for a known T
Num
Human Body
Latch-up
1
2
3
ESD Protection and Latch-Up Immunity
Model
Human Body Model (HBM)
Charge Device Model (CDM)
Latch-up Current at T
Series Resistance
Storage Capacitance
Number of Pulse per pin
Minimum input voltage limit
Maximum input voltage limit
Table A-5. ESD and Latch-Up Protection Characteristics
Table A-4. ESD and Latch-up Test Conditions
A
= 125°C
Rating
A
. Using this value of K, the values of P
MC9S08DZ60 Series Data Sheet, Rev. 4
Description
A
.
Symbol
V
V
I
HBM
CDM
LAT
Symbol
+/- 2000
+/- 500
+/- 100
R1
C
–
Min
D
and T
J
Value
1500
–2.5
100
can be obtained by
7.5
Max
3
Freescale Semiconductor
–
–
–
Unit
pF
Ω
Unit
mA
V
V
V
V