EVB9S08DZ60 Freescale Semiconductor, EVB9S08DZ60 Datasheet - Page 395

• Manufacturer Part Number: EVB9S08DZ60
• Description: BOARD EVAL FOR 9S08DZ60
• Manufacturer: Freescale Semiconductor
• Type: MCUr

Specifications of EVB9S08DZ60

• Contents: Module and Misc Hardware
• Processor To Be Evaluated: S08D
• Data Bus Width: 8 bit
• Interface Type: RS-232, USB
• Silicon Manufacturer: Freescale
• Core Architecture: HCS08
• Core Sub-architecture: HCS08
• Silicon Core Number: MC9S08
• Silicon Family Name: S08D
• Kit Contents: Board Cables CD Power Supply
• Rohs Compliant: Yes
• For Use With/related Products: MC9S08DZ60
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

B.2.2
The two read-only TPM counter registers contain the high and low bytes of the value in the TPM counter.
Reading either byte (TPMxCNTH or TPMxCNTL) latches the contents of both bytes into a buffer where
they remain latched until the other byte is read. This allows coherent 16-bit reads in either order. The
coherency mechanism is automatically restarted by an MCU reset, a write of any value to TPMxCNTH or
TPMxCNTL, or any write to the timer status/control register (TPMxSC).
Reset clears the TPM counter registers.
Freescale Semiconductor
Reset
W
R
Bit 15
Timer Counter Registers (TPMxCNTH:TPMxCNTL)
1
2
0
7
The maximum frequency that is allowed as an external clock is one-fourth of the bus
frequency.
If the external clock input is shared with channel n and is selected as the TPM clock source,
the corresponding ELSnB:ELSnA control bits should be set to 0:0 so channel n does not try
to use the same pin for a conflicting function.
CLKSB:CLKSA
PS2:PS1:PS0
0:0
0:1
1:0
1:1
14
0
6
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
Figure B-3. Timer Counter Register High (TPMxCNTH)
Table B-2. TPM Clock Source Selection
Table B-3. Prescale Divisor Selection
MC9S08DZ60 Series Data Sheet, Rev. 4
Any write to TPMxCNTH clears the 16-bit counter.
13
0
5
TPM Clock Source to Prescaler Input
No clock selected (TPMx disabled)
12
0
4
External source (TPMxCLK)
Fixed system clock (XCLK)
Bus rate clock (BUSCLK)
TPM Clock Source Divided-By
11
3
0
Appendix B Timer Pulse-Width Modulator (TPMV2)
128
16
32
64
1
2
4
8
10
0
1,2
2
9
0
1
Bit 8
0
0
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