MCF5253CVM140J Freescale Semiconductor, MCF5253CVM140J Datasheet - Page 156

• Manufacturer Part Number: MCF5253CVM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

System Integration Module (SIM)
9.4.2.1
The interrupt level, intpri[1:7], of the 64 interrupts serviced by the secondary interrupt controller can be
programmed for every interrupt separately. Every interrupt is given a 4-bit field in one of the interrupt
priority register. This 4-bit field controls level setting for the interrupt. Values 1–7 correspond with
ColdFire interrupt priorities. Value 0 is off.
9.4.2.2
All secondary interrupts are autovectored. The vector number for interrupt 0 is given by register
INTBASE. The vector numbers for the other interrupts are offset from this number. Vector number for
interrupt 23 is e.g. INTBASE + 23. The secondary interrupt controller will generate vector numbers
INTBASE to INTBASE + 63 for its 64 interrupts.
9-12
MBAR2 + $140
MBAR2 + $144
MBAR2 + $148
MBAR2 + $14C
MBAR2 + $150
MBAR2 + $154
MBAR2 + $158
MBAR2 + $15C
Address MBAR2 + $16B
Reset
Address
W
R
MBAR2 + $16B
MBAR2 + $167
Address
BASE[7]
Interrupt Level Selection
Interrupt Vector Generation Register
0
7
Table 9-11. Secondary Interrupt Controller Registers Memory Map (continued)
Table 9-12. Secondary Interrupt Level Programming Bit Assignment
INTPRI1
INTPRI2
INTPRI3
INTPRI4
INTPRI5
INTPRI6
INTPRI7
INTPRI8
Name
BASE[6]
0
6
SPURVEC
INTBASE
Name
31–28
INT15
INT23
INT31
INT39
INT47
INT55
INT63
INT7
Bit
BASE[5]
MCF5253 Reference Manual, Rev. 1
0
5
Figure 9-7. INTBase Register
27–24
INT22
INT30
INT38
INT46
INT54
INT62
INT14
INT6
Width
Bit
8
8
BASE[4]
4
0
Interrupt base vector
spurious vector
23–20
INT13
INT21
INT29
INT37
INT45
INT53
INT61
INT5
Bit
BASE[3]
Description
19–16
INT12
INT20
INT28
INT36
INT44
INT52
INT60
INT4
0
Bit
3
15–12
INT11
INT19
INT27
INT35
INT43
INT51
INT59
INT3
BASE[2]
Bit
0
2
INT10
INT18
INT26
INT34
INT42
INT50
INT58
11–8
INT2
Reset Value
Bit
BASE[1]
Freescale Semiconductor
$00
$00
Access: User read/write
0
1
INT17
INT25
INT33
INT41
INT49
INT57
INT1
INT9
7–4
Bit
BASE[0]
Access
R/W
R/W
INT16
INT24
INT32
INT40
INT48
INT56
INT8
INT0
0
0
3–0
Bit