MCF5253CVM140J Freescale Semiconductor, MCF5253CVM140J Datasheet - Page 601

• Manufacturer Part Number: MCF5253CVM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

24.11.3.6 Isochronous Endpoint Operational Model
Isochronous endpoints are used for real-time scheduled delivery of data and their operational model is
significantly different than the host throttled Bulk, Interrupt, and Control data pipes. Real time delivery by
the USB_DR will is accomplished by the following:
The USB_DR in host mode uses the periodic frame list to schedule data exchanges to Isochronous
endpoints. The operational model for device mode does not use such a data structure. Instead, the same
dTD used for Control/Bulk/Interrupt endpoints is also used for isochronous endpoints. The difference is
in the handling of the dTD.
The first difference between bulk and ISO-endpoints is that priming an ISO-endpoint is a delayed
operation such that an endpoint will become primed only after a SOF is received. After the DCD writes
the prime bit, the prime bit will be cleared as usual to indicate to the software that the device controller
completed a priming the dTD for transfer. Internal to the design, the device controller hardware masks that
prime start until the next frame boundary. This behavior is hidden from the DCD but occurs so that the
device controller can match the dTD to a specific (micro)frame.
Another difference with isochronous endpoints is that the transaction must wholly complete in a
(micro)frame. Once an ISO transaction is started in a (micro)frame it will retire the corresponding dTD
when MULT transactions occur or the device controller finds a fulfillment condition.
The transaction error bit set in the status field indicates a fulfillment error condition. When a fulfillment
error occurs, the frame after the transfer failed to complete wholly, the device controller will force retire
the ISO-dTD and move to the next ISO-dTD.
It is important to note that fulfillment errors are only caused due to partially completed packets. If no
activity occurs to a primed ISO-dTD, the transaction will stay primed indefinitely. This means it is up to
the software discard transmit ISO-dTDs that pile up from a failure of the host to move the data.
Finally, the last difference with ISO packets is in the data level error handling. When a CRC error occurs
on a received packet, the packet is not retried similar to bulk and control endpoints. Instead, the CRC is
noted by setting the Transaction Error bit and the data is stored as usual for the application software to sort
out.
Freescale Semiconductor
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Exactly MULT Packets per (micro)Frame are transmitted/received. Note: MULT is a two-bit field
in the device Queue Head. The variable length packet protocol is not used on isochronous
endpoints.
NAK responses are not used. Instead, zero length packets and sent in response to an IN request to
an unprimed endpoints. For unprimed RX endpoints, the response to an OUT transaction is to
ignore the packet within the device controller.
Prime requests always schedule the transfer described in the dTD for the next (micro)frame. If the
ISO-dTD is still active after that frame, then the ISO-dTD will be held ready until executed or
canceled by the DCD.
TX Packet Retired
— MULT counter reaches zero.
— Fulfillment Error [Transaction Error bit is set]
— #Packets Occurred > 0 AND # Packets Occurred < MULT
MCF5253 Reference Manual, Rev. 1
Universal Serial Bus Interface
24-139