MCF5253CVM140J Freescale Semiconductor, MCF5253CVM140J Datasheet - Page 523

• Manufacturer Part Number: MCF5253CVM140J
• Description: IC MCU 2.1MIPS 140MHZ 225MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF525xr

Specifications of MCF5253CVM140J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 140MHz
• Connectivity: CAN, EBI/EMI, I²C, QSPI, UART/USART, USB OTG
• Peripherals: DMA, WDT
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 1.08 V ~ 1.32 V
• Data Converters: A/D 6x12b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 225-MAPBGA
• Processor Series: MCF525x
• Core: ColdFire V2
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Number Of I /o: -
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

24.8.5.4
The last five DWords of a queue element transfer descriptor is an array of physical memory address
pointers. These pointers reference the individual pages of a data buffer.
The system software initializes Current Offset field to the starting offset into the current page, where
current page is selected via the value in the C_Page field.
24.8.6
Figure 24-41
1
2
3
4
Freescale Semiconductor
31–12 Buffer Pointer
dt
11–0 Current Offset
31
Mult
Bit
Offsets 0x04 through 0x0B contain the static endpoint state.
Host controller read/write; all others read-only.
Offsets 0x10 through 0x2F contain the transfer overlay.
Offsets 0x14 through 0x27 contain the transfer results.
1
RL
30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
(Pages 1-4)
(Page 0)/
(page n)
Name
C
Port Number
Queue Head
–
qTD Buffer Page Pointer List
shows the queue head structure.
Total Bytes to Transfer
Maximum Packet Length
Buffer Pointer (Page 0)
Buffer Pointer (Page 1)
Buffer Pointer (Page 2)
Buffer Pointer (Page 3)
Buffer Pointer (Page 4)
Each element in the list is a 4K page aligned physical memory address. The lower 12 bits in each pointer
are reserved (except for the first one), as each memory pointer must reference the start of a 4K page.
The field C_Page specifies the current active pointer. When the transfer element descriptor is fetched,
the starting buffer address is selected using C_Page (similar to an array index to select an array
element). If a transaction spans a 4K buffer boundary, the host controller must detect the page-span
boundary in the data stream, increment C_Page and advance to the next buffer pointer in the list, and
conclude the transaction via the new buffer pointer.
This field is reserved in all pointers except the first one (that is, Page 0). The host controller should ignore
all reserved bits. For the page 0 current offset interpretation, this field is the byte offset into the current
page (as selected by C_Page). The host controller is not required to write this field back when the qTD
is retired. The software should ensure the reserved fields are initialized to zeros.
Queue Head Horizontal Link Pointer
Alternate Next qTD Pointer
Hub Addr
Current qTD Pointer
2
Next qTD Pointer
Figure 24-41. Queue Head Layout
MCF5253 Reference Manual, Rev. 1
Table 24-54. qTD Buffer Pointer
2
2
2
2
2
ioc
15
H
2
2
2
dtc EPS
14
C_Page
µFrame C-mask
2
13 12 11 10
2
Description
Cerr
EndPt
2
0000
Code
9
PID
S-bytes
8
2
0000_0000_0000
0000_0000_0000
Current Offset
7
I
2
6
µFrame S-mask
5
C-prog-mask
Device Address
Status
4
Universal Serial Bus Interface
00
2
NakCnt
3
0000
00000
2
FrameTag
2
Typ
2
2
1
T
T
T
0
2
2
2
Offset
0x1C
0x14
0x18
0x20
0x24
0x2C
0x04
0x08
0x10
0x28
0x0C
0x00
24-61
3,4
3,4
3,4
3,4
3,4
1
1
3
3
3