MC68HC705B16CFN

Manufacturer Part NumberMC68HC705B16CFN
DescriptionIC MCU 2.1MHZ 15K OTP 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC05
MC68HC705B16CFN datasheet
 


Specifications of MC68HC705B16CFN

Core ProcessorHC05Core Size8-Bit
Speed2.1MHzConnectivitySCI
PeripheralsPOR, WDTNumber Of I /o32
Program Memory Size15KB (15K x 8)Program Memory TypeOTP
Eeprom Size256 x 8Ram Size352 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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F.2
External clock
When using an external clock the OSC1 and OSC2 pins should be driven in antiphase (see
Figure
D-2). The t
or t
OXOV
ILCH
external clock input. The equivalent specification of the external clock source should be used in
lieu of t
or t
.
OXOV
ILCH
F.3
RESET pin
When the oscillator is running in a stable condition, the MCU is reset when a logic zero is applied
to the RESET input for a minimum period of 3.0 machine cycles (t
Section
9.1.3.
F.4
EPROM
The MC68HC705B16N memory map is given in
of EPROM (including 14 bytes for User vectors) and 256 bytes of EEPROM.
The EPROM array is supplied by the VPP6 pin in both read and program modes. Typically the
user’s software would be loaded into a programming board where V
bootstrap loader routines. It would then be placed in an application where no programming occurs.
In this case the VPP6 pin should be hardwired to V
Warning: A minimum V
voltage must be applied to the VPP6 pin at all times, including
DD
power-on. Failure to do so could result in permanent damage to the device. Unless
otherwise stated, EPROM programming is guaranteed at ambient (25°C) temperature
only.
F.4.1
EPROM read operation
The execution of a program in the EPROM address range or a load from the EPROM are both
read operations. The E6LAT bit in the EPROM/EEPROM control register should be cleared to ‘0’
which automatically resets the E6PGM bit. In this way the EPROM is read like a normal ROM.
Reading the EPROM with the E6LAT bit set will give data that does not correspond to the actual
memory content. As interrupt vectors are in EPROM, they will not be loaded when E6LAT is set.
Similarly, the bootstrap ROM routines cannot be executed when E6LAT is set. In read mode, the
VPP6 pin must be at the V
level. When entering the STOP mode, the EPROM is automatically
DD
set to the read mode.
Note:
An erased byte reads as $00.
MC68HC05B6
Rev. 4.1
specifications (see
Section
F.9) do not apply when using an
CYC
Figure
F-2. The device has a total of 15168 bytes
.
DD
MC68HC705B16N
). For more information see
is controlled by one of the
PP6
Freescale
F-5
14