MC68HC705B16CFN

Manufacturer Part NumberMC68HC705B16CFN
DescriptionIC MCU 2.1MHZ 15K OTP 52-PLCC
ManufacturerFreescale Semiconductor
SeriesHC05
MC68HC705B16CFN datasheet
 


Specifications of MC68HC705B16CFN

Core ProcessorHC05Core Size8-Bit
Speed2.1MHzConnectivitySCI
PeripheralsPOR, WDTNumber Of I /o32
Program Memory Size15KB (15K x 8)Program Memory TypeOTP
Eeprom Size256 x 8Ram Size352 x 8
Voltage - Supply (vcc/vdd)4.5 V ~ 5.5 VData ConvertersA/D 8x8b
Oscillator TypeInternalOperating Temperature-40°C ~ 85°C
Package / Case52-PLCCLead Free Status / RoHS StatusContains lead / RoHS non-compliant
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I.3
Control timing for 5V operation
= 5.0 Vdc ± 10%, V
(V
DD
Frequency of operation
Crystal option
External clock option
Internal operating frequency (f
Crystal
External clock
Cycle time (see
Crystal oscillator start-up time (see
Stop recovery start-up time (crystal oscillator)
External RESET input pulse width
Power-on RESET output pulse width
4064 cycle
16 cycle
Watchdog RESET output pulse width
Watchdog time-out
EEPROM byte erase time
– 40 to 85 (extended)
EEPROM byte program time
– 40 to 85 (extended)
Timer (see
Resolution
Input capture pulse width
Input capture pulse period
Interrupt pulse width (edge-triggered)
Interrupt pulse period
OSC1 pulse width
Write/Erase endurance
Data retention
(1) For bus frequencies less than 2 MHz, the internal RC oscillator should be used when
programming the EEPROM.
(2) Since a 2-bit prescaler in the timer must count four external cycles (t
factor in determining the timer resolution.
(3) The minimum period t
execute the capture interrupt service routine plus 24 t
(4) The minimum period t
execute the interrupt service routine plus 21 t
(5) At a temperature of 85°C
(6) Refer to Reliability Monitor Report (current quarterly issue) for current failure rate
information.
15
Freescale
I-4
= 0 Vdc, T
= –40 to +85°C)
SS
A
Characteristic
Symbol
f
OSC
f
OSC
/2)
OSC
f
OP
f
OP
Figure
9-1)
t
CYC
Figure
9-1)
t
OXOV
t
ILCH
t
RL
t
PORL
t
PORL
t
DOGL
t
DOG
0 to 70 (standard)
t
ERA
t
ERA
(1)
0 to 70 (standard)
t
PROG
t
PROG
Figure
I-1)
(2)
t
RESL
t
, t
TH
TL
t
TLTL
t
ILIH
t
ILIL
t
, t
OH
OL
(5)(6)
(5)(6)
should not be less than the number of cycle times it takes to
TLTL
should not be less than the number of cycle times it takes to
ILIL
.
CYC
HIGH SPEED OPERATION
Min
Max
Unit
8.0
MHz
dc
8.0
MHz
4.0
MHz
dc
4.0
MHz
250
ns
100
ms
100
ms
1.5
t
CYC
t
CYC
4064
t
CYC
16
1.5
t
CYC
6144
7168
t
CYC
10
ms
10
ms
10
ms
10
ms
4
t
CYC
125
ns
(3)
t
CYC
125
ns
(4)
t
CYC
90
ns
10000
cycles
10
years
), this is the limiting
CYC
.
CYC
MC68HC05B6
Rev. 4.1