MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 147
MC68HC711KS2MFN4
Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68HC711KS2MFN4.pdf
(290 pages)
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6.11 Internal Pullup Resistors
M68HC11K Family
MOTOROLA
NOTE:
NOTE:
Address: $002C
Address: $003F
M68HC11KS series devices contain selectable internal pullup resistors
for ports B, F, G, and H. The resistors for each port are enabled by
setting the corresponding bit in the PPAR register. PPAR itself must be
enabled by setting the PAREN bit in the system configuration register
(CONFIG). Refer to
xPPUE — Port x Pin Pullup Enable Bits
FPPUE and BPPUE do not apply in expanded mode because port F and
B are address outputs.
CONFIG is writable once in normal modes and writable at any time in
special modes.
PAREN — Pullup Assignment Register Enable Bit
Reset:
Reset:
Read:
Read:
Write:
Write:
Figure 6-18. System Configuration Register (CONFIG)
Figure 6-17. Port Pullup Assignment Register (PPAR)
Only active when enabled by the PAREN bit in the CONFIG register
0 = Port x pin on-chip pullup devices disabled
1 = Port x pin on-chip pullup devices enabled
0 = PPAR register disabled
1 = PPAR register enabled; pullups can be enabled through PPAR
ROMAD
Bit 7
Bit 7
—
0
0
Parallel Input/Output
6
0
0
6
1
1
Figure 6-17
CLKX
—
5
0
0
5
PAREN
and
—
4
0
0
4
Figure
NOSEC
HPPUE
3
1
3
1
6-18.
NOCOP
GPPUE
—
2
1
2
Internal Pullup Resistors
Parallel Input/Output
ROMON
FPPUE
—
1
1
1
Technical Data
BPPUE
EEON
Bit 0
Bit 0
—
1
147
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