MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 161
MC68HC711KS2MFN4
Manufacturer Part Number
MC68HC711KS2MFN4
Description
32K EPROM - SLOW MODE
Manufacturer
Freescale Semiconductor
Datasheet
1.MC68HC711KS2MFN4.pdf
(290 pages)
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7.9.3 Serial Communications Control Register 2
M68HC11K Family
MOTOROLA
Address $0073
PE — Parity Enable Bit
PT — Parity Type Bit
TIE — Transmit Interrupt Enable Bit
TCIE — Transmit Complete Interrupt Enable Bit
RIE — Receiver Interrupt Enable Bit
ILIE — Idle Line Interrupt Enable Bit
Reset:
Read:
Write:
0 = Parity disabled
1 = Parity enabled
0 = Parity even (even number of 1s causes parity bit to be 0, odd
1 = Parity odd (odd number of 1s causes parity bit to be 0, even
0 = TDRE interrupts disabled
1 = SCI interrupt is requested when the TDRE status flag is set.
0 = TC interrupts disabled
1 = SCI interrupt is requested when the TC status flag is set.
0 = RDRF and OR interrupts disabled
1 = SCI interrupt is requested when the RDRF flag or OR flag is set.
0 = IDLE interrupts disabled
1 = SCI interrupt is requested when the IDLE status flag is set.
Serial Communications Interface (SCI)
Bit 7
TIE
number of 1s causes parity bit to be 1)
number of 1s causes parity bit to be 1)
0
Figure 7-8. SCI Control Register 2 (SCCR2)
TCIE
6
0
RIE
5
0
ILIE
4
0
Serial Communications Interface (SCI)
TE
3
0
RE
2
0
RWU
1
0
Technical Data
SCI Registers
Bit 0
SBK
0
161
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