MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 206

• Manufacturer Part Number: MC68HC711KS2MFN4
• Description: 32K EPROM - SLOW MODE
• Manufacturer: Freescale Semiconductor

Timing System
9.7.3 Timer Interrupt Flag 2 Register
Technical Data
206
Address: $0025
PAMOD — Pulse Accumulator Mode Bit
PEDGE — Pulse Accumulator Edge Control Bit
Clear each flag by writing a 1 to the corresponding bit position.
Reset:
Read:
Write:
In event counting mode, PEDGE selects either the rising or falling
edge of the input at PA7 to increment the pulse accumulator counter.
In gated accumulation mode, PEDGE determines which input level at
PA7 inhibits counter increments from the internal clock.
shows the relationship between PEDGE and PAMOD.
0 = Event counter
1 = Gated time accumulation
PAMOD
Bit 7
TOF
0
0
1
1
0
Figure 9-24. Timer Interrupt Flag 2 (TFLG2)
Table 9-6. Pulse Accumulator Edge Control
RTIF
Timing System
6
0
PEDGE
0
1
0
1
PAOVF
5
0
PAI falling edge increments the counter.
PAI rising edge increments the counter.
A 0 on PAI inhibits counting.
A 1 on PAI inhibits counting.
PAIF
4
0
3
0
0
Action on Clock
2
0
0
M68HC11K Family
Table 9-6
1
0
0
MOTOROLA
Bit 0
0
0