MC68HC711KS2MFN4 Freescale Semiconductor, MC68HC711KS2MFN4 Datasheet - Page 61

• Manufacturer Part Number: MC68HC711KS2MFN4
• Description: 32K EPROM - SLOW MODE
• Manufacturer: Freescale Semiconductor

M68HC11K Family
MOTOROLA
SBCA (opr)
SBCB (opr)
SUBA (opr)
SUBB (opr)
SUBD (opr)
Mnemonic
STAA (opr)
STAB (opr)
STX (opr)
STD (opr)
STS (opr)
STY (opr)
STOP
TEST
SBA
SEC
SEV
SWI
TAB
TAP
TBA
SEI
Subtract B from
Transfer A to B
Transfer B to A
TEST (Only in
Subtract with
Subtract with
Memory from
Memory from
Memory from
Transfer A to
Carry from A
Carry from B
Set Overflow
Stop Internal
Set Interrupt
Accumulator
Accumulator
Accumulator
Test Modes)
CC Register
Store Stack
Store Index
Store Index
Operation
Register X
Register Y
Set Carry
Software
Subtract
Subtract
Subtract
Interrupt
Clocks
Pointer
Mask
Store
Store
Store
Flag
A
A
B
D
A
B
D
Address Bus Counts
A
D – M : M + 1
SP
IX
IY
See
A – M – C
B – M – C
Description
A – M
B – M
A – B
A
M, B
A
B
A
B
1
1
Figure 3-2
1
M : M + 1
M : M + 1
M : M + 1
—
Table 3-1. Instruction Set (Sheet 6 of 7)
CCR
C
V
M
M
B
A
I
A
M + 1
A
B
A
B
D
A
A
A
A
A
B
B
B
B
B
A
A
A
A
B
B
B
B
A
A
A
A
A
A
A
A
A
A
Central Processor Unit (CPU)
Addressing
Mode
INH
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
INH
INH
INH
DIR
EXT
IND,X
IND,Y
DIR
EXT
IND,X
IND,Y
DIR
EXT
IND,X
IND,Y
INH
DIR
EXT
IND,X
IND,Y
DIR
EXT
IND,X
IND,Y
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
IMM
DIR
EXT
IND,X
IND,Y
INH
INH
INH
INH
INH
18
18
18
18
18
18
CD
18
18
1A
18
18
18
18
Opcode
10
82
92
A2
A2
C2
D2
E2
E2
0D
0F
0B
97
B7
D7
F7
DD
FD
CF
9F
BF
DF
FF
DF
FF
EF
EF
80
90
A0
A0
C0
D0
E0
E0
83
93
A3
A3
3F
16
06
17
00
B2
F2
A7
A7
E7
E7
ED
ED
AF
AF
EF
EF
B0
F0
B3
Instruction
ii
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
dd
hh ll
ff
ff
dd
hh ll
ff
ff
dd
hh ll
ff
ff
dd
hh ll
ff
ff
dd
hh ll
ff
ff
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
ii
dd
hh ll
ff
ff
jj kk
dd
hh ll
ff
ff
Operand
—
—
—
—
—
—
—
—
—
—
Cycles
14
2
2
3
4
4
5
2
3
4
4
5
2
2
2
3
4
4
5
3
4
4
5
4
5
5
6
2
4
5
5
6
4
5
5
6
5
6
6
6
2
3
4
4
5
2
3
4
4
5
4
5
6
6
7
2
2
2
*
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
S
Central Processor Unit (CPU)
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
X
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
H
Condition Codes
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
1
1
I
—
—
—
—
—
—
N
Technical Data
Instruction Set
—
—
—
—
—
—
Z
—
—
—
—
—
V
1
0
0
0
0
0
0
0
0
—
—
—
—
—
—
—
—
—
—
—
—
—
C
1
61