PEF 22508 E V1.1-G Infineon Technologies, PEF 22508 E V1.1-G Datasheet - Page 114

• Manufacturer Part Number: PEF 22508 E V1.1-G
• Description: IC INTERFACE E1/T1/J1 LBGA-256
• Manufacturer: Infineon Technologies
• Series: OctalLIU™r

Specifications of PEF 22508 E V1.1-G

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 8
• Voltage - Supply: 1.8V, 3.3V
• Current - Supply: 370mA
• Power (watts): 140mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-LSBGA
• Includes: Automatic Protection Switching, Clock Generation, Power-Down, Transmit Line Monitor, Tristate Function
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEF22508EV1.1T; PEF22508EV11GXP; SP000029953

Clock Mode Register 4
CMR4
Clock Mode Register 4
Field
IAR
RS
Data Sheet
Bits
7:3
2:0
Type
rw
rw
Description
Integral parameter selection
(Corner frequency and attenuation selection) for the DCO-R
Only valid if CMR6.DCOCOMPN = ´1´and CMR2.ECFAR = ´1´, see
Chapter
Receive Clock (RCLK) Frequency Selection
See also
000
001
010
011
100
101
110
111
B
B
B
B
B
B
B
B
, clock recovered from the line through the DPLL drives RCLK.
, clock recovered from the line through the DPLL drives RCLK.
logically OR´d with the incoming LOS signal.
, 2.048 MHz, dejitered, sourced by DCO-R.
, 4.096 MHz, dejitered, sourced by DCO-R.
, 8.192 MHz, dejitered, sourced by DCO-R.
, 16.384 MHz, dejitered, sourced by DCO-R.
, 2.048 MHz logically OR´d with LOS.
, 16.384 MHz logically OR´d with LOS.
3.7.9.
Chapter
Offset
xx41
114
3.7.
H
Register DescriptionClock Mode Register 4
Rev. 1.0, 2005-06-02
PEF 22508 E
OctalLIU
Reset Value
00
TM
H