PEF 22508 E V1.1-G Infineon Technologies, PEF 22508 E V1.1-G Datasheet - Page 45

• Manufacturer Part Number: PEF 22508 E V1.1-G
• Description: IC INTERFACE E1/T1/J1 LBGA-256
• Manufacturer: Infineon Technologies
• Series: OctalLIU™r

Specifications of PEF 22508 E V1.1-G

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 8
• Voltage - Supply: 1.8V, 3.3V
• Current - Supply: 370mA
• Power (watts): 140mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-LSBGA
• Includes: Automatic Protection Switching, Clock Generation, Power-Down, Transmit Line Monitor, Tristate Function
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEF22508EV1.1T; PEF22508EV11GXP; SP000029953

Figure 6
Figure 7
The following configurations of the SCI interface of the OctalLIU
command into the SCI configuration register (control bits ´10
Table 3
•
•
•
•
•
•
The following SCI configurations are fixed and cannot be set by the micro controller:
•
•
The maximum possible SCI clock frequency is 6 MHz for point to point applications (full duplex) and about 2 MHz
for multipoint to multipoint applications, dependent on the electrical capacity of the bus lines of the PCB.
Figure 8
communication. The HDLC flags mark beginning and end of all messages.
Data Sheet
Half duplex/full duplex (reset value: Half duplex), bit DUP.
OpenDrain/push-pull (configuration of output pin to openDrain/push-pull is in general independent of the
duplex mode and must be set appropriately in application) (reset value: open Drain), bit PP.
CRC for transmit and receive on/off (reset value: off), bit CRC_EN.
Automatic acknowledgement of CMD messages on/off (reset value: off), bit ACK_EN.
Clock edge rising/falling (reset value: falling), bit CLK_POL.
Clock gating (reset value: off), bit CLK_GAT.
Interrupt feature is disabled, bit INT_EN = ´0
Arbitration always made with LAPD (only SCI applications like in
= ´0
B
and
´.
shows the message structure of the OctalLIU
SCI Interface Application with Point To Point Connections
SCI Interface Application with Multipoint To Multipoint Connection
Figure
9):
Micro-processor
Interworking
Device
or
Microprocessor
Interworking
Device
or
B
Clk
´.
Data
Data
Data
Clk
Clk
IM(1:0)
IM(1:0)
IM(1:0)
45
TxData
RxData
TxData
RxData
TxData
RxData
Clk
Clk
Clk
oD
IM(1:0)
IM(1:0)
IM(1:0)
B
SCI_TXD
SCI_RXD
´, see
TM
OctalLIU
OctalLIU
OctalLIU
PP
. The SCI interface uses HDLC frames for
TM
SCI_TXD
SCI_RXD
Table
can be set by the micro controller by a write
Figure 6
OctalLIU
OctalLIU
OctalLIU
OctalLIU_SCI_halfduplex
8, SCI register address is ´0000
and
A(5:0)
A(5:0)
A(5:0)
Figure 7
OctalLIU-Interfaces_2
Functional Description
are possible), bit ARB
Rev. 1.0, 2005-06-02
PEF 22508 E
OctalLIU
H
´, see
TM