PEF 22508 E V1.1-G Infineon Technologies, PEF 22508 E V1.1-G Datasheet - Page 35

• Manufacturer Part Number: PEF 22508 E V1.1-G
• Description: IC INTERFACE E1/T1/J1 LBGA-256
• Manufacturer: Infineon Technologies
• Series: OctalLIU™r

Specifications of PEF 22508 E V1.1-G

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 8
• Voltage - Supply: 1.8V, 3.3V
• Current - Supply: 370mA
• Power (watts): 140mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-LSBGA
• Includes: Automatic Protection Switching, Clock Generation, Power-Down, Transmit Line Monitor, Tristate Function
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEF22508EV1.1T; PEF22508EV11GXP; SP000029953

Table 1
Pin No. Ball
Data Sheet
No.
P1
R1
M14
M15
L12
L11
I/O Signals (cont’d)
Name
XPA4
XPB4
XPA5
XPB5
XPA6
XPB6
Pin Type Buffer
I/O
I/O
I/O
Type
PU/–
PU/–
PU/–
35
Function
Transmit Multifunction Pins A and B, port 4
Depending on programming of bits PC(1:2).XPC(3:0)
these multifunction ports carry information to the framer
interface or from the framer to the OctalLIU
reset the ports are configured to be inputs. With the
selection of the appropriate pin function, the
corresponding input/output configuration is achieved
automatically. Depending on bit DIC3.RESX
latching/transmission of data is done with the rising or
falling edge of FCLKX. If not connected, an internal pull-
up transistor ensures a high input level.
Each input function (TCLK, XDIN, XLT or XLT) may only
be selected once.
Selectable pin functions as described for port 1.
Transmit Multifunction Pins A and B, port 5
Depending on programming of bits PC(1:2).XPC(3:0)
these multifunction ports carry information to the framer
interface or from the framer to the OctalLIU
reset the ports are configured to be inputs. With the
selection of the appropriate pin function, the
corresponding input/output configuration is achieved
automatically. Depending on bit DIC3.RESX
latching/transmission of data is done with the rising or
falling edge of FCLKX. If not connected, an internal pull-
up transistor ensures a high input level.
Each input function (TCLK, XDIN, XLT or XLT) may only
be selected once.
Selectable pin functions as described for port 1.
Transmit Multifunction Pins A and B, port 6
Depending on programming of bits PC(1:2).XPC(3:0)
these multifunction ports carry information to the framer
interface or from the framer to the OctalLIU
reset the ports are configured to be inputs. With the
selection of the appropriate pin function, the
corresponding input/output configuration is achieved
automatically. Depending on bit DIC3.RESX
latching/transmission of data is done with the rising or
falling edge of FCLKX. If not connected, an internal pull-
up transistor ensures a high input level.
Each input function (TCLK, XDIN, XLT or XLT) may only
be selected once.
Selectable pin functions as described for port 1.
Rev. 1.0, 2005-06-02
Pin Descriptions
PEF 22508 E
OctalLIU
TM
TM
TM
. After
. After
. After
TM