PEF 22508 E V1.1-G Infineon Technologies, PEF 22508 E V1.1-G Datasheet - Page 22

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PEF 22508 E V1.1-G

Manufacturer Part Number
PEF 22508 E V1.1-G
Description
IC INTERFACE E1/T1/J1 LBGA-256
Manufacturer
Infineon Technologies
Series
OctalLIU™r
Datasheet

Specifications of PEF 22508 E V1.1-G

Function
Line Interface Unit (LIU)
Interface
E1, J1, T1
Number Of Circuits
8
Voltage - Supply
1.8V, 3.3V
Current - Supply
370mA
Power (watts)
140mW
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
256-LSBGA
Includes
Automatic Protection Switching, Clock Generation, Power-Down, Transmit Line Monitor, Tristate Function
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Other names
PEF22508EV1.1T
PEF22508EV11GXP
SP000029953
Table 1
Pin No. Ball
Data Sheet
No.
T6
T7
R7
T11
T9
T10
T13
T15
T14
I/O Signals (cont’d)
Name
RL1.4
ROID4
RL2.4
RLS24
RL1.5
ROID5
RL2.5
RLS25
RL1.6
ROID6
RL2.6
RLS26
Pin Type Buffer
I (analog) –
I
I (analog) –
IO
(analog)
I (analog) –
I
I (analog) –
IO
(analog)
I (analog) –
I
I (analog) –
IO
(analog)
Type
22
Function
Line Receiver input 1, port 4
Analog input from the external transformer. Selected if
LIM1.DRS is cleared.
Receive Optical Interface Data, port 4
Unipolar data received from a fiber-optical interface with
2048 kbit/s (E1) or 1544 kbit/s (T1/J1). If CMI coding is
selected (MR0.RC(1:0) = ´01
internal DPLL recovers clock an data; no clock signal on
RCLKI2 is required.
Line Receiver input 2, port 4
Analog input from the external transformer. Selected if
LIM1.DRS is cleared.
Receive Line Switch, port 4
Connector of the analog switch.
Line Receiver input 1, port 5
Analog input from the external transformer. Selected if
LIM1.DRS is cleared.
Receive Optical Interface Data, port 5
Unipolar data received from a fiber-optical interface with
2048 kbit/s (E1) or 1544 kbit/s (T1/J1). If CMI coding is
selected (MR0.RC(1:0) = ´01
internal DPLL recovers clock an data; no clock signal on
RCLKI2 is required.
Line Receiver input 2, port 5
Analog input from the external transformer. Selected if
LIM1.DRS is cleared.
Receive Line Switch, port 5
Connector of the analog switch.
Line Receiver input 1, port 6
Analog input from the external transformer. Selected if
LIM1.DRS is cleared.
Receive Optical Interface Data, port 6
Unipolar data received from a fiber-optical interface with
2048 kbit/s (E1) or 1544 kbit/s (T1/J1). If CMI coding is
selected (MR0.RC(1:0) = ´01
internal DPLL recovers clock an data; no clock signal on
RCLKI2 is required.
Line Receiver input 2, port 6
Analog input from the external transformer. Selected if
LIM1.DRS is cleared.
Receive Line Switch, port 6
Connector of the analog switch.
b
b
b
´ and LIM0.DRS = ´1´), an
´ and LIM0.DRS = ´1´), an
´ and LIM0.DRS = ´1´), an
Rev. 1.0, 2005-06-02
Pin Descriptions
PEF 22508 E
OctalLIU
TM

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