PEF 22508 E V1.1-G Infineon Technologies, PEF 22508 E V1.1-G Datasheet - Page 116

• Manufacturer Part Number: PEF 22508 E V1.1-G
• Description: IC INTERFACE E1/T1/J1 LBGA-256
• Manufacturer: Infineon Technologies
• Series: OctalLIU™r

Specifications of PEF 22508 E V1.1-G

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 8
• Voltage - Supply: 1.8V, 3.3V
• Current - Supply: 370mA
• Power (watts): 140mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-LSBGA
• Includes: Automatic Protection Switching, Clock Generation, Power-Down, Transmit Line Monitor, Tristate Function
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEF22508EV1.1T; PEF22508EV11GXP; SP000029953

Clock Mode Register 6
CMR6
Clock Mode Register 6
Field
DCOCOMPN
SRESR
SRESX
STF
Data Sheet
Bits
7
6
5
4:2
Type
rw
rw
rw
rw
Description
Compatibility programming of DCO-R/DCO-X disable
Only applicable if CMR2.ECFAR/ECFAX is set. See
Table
0
1
Soft Reset of DCO-R
By setting this bit a soft reset of the DCO-R will be performed: The initial
phase error is set to zero and the loop filter is cleared. To enable the
DCO-R lock functionality, this bit must be cleared subsequently. See
Chapter
0
1
Soft Reset of DCO-X
By setting this bit a soft reset of the DCO-X will be performed: The initial
phase error is set to zero and the loop filter is cleared. To enable the
DCO-X lock functionality, this bit must be cleared subsequently. See
Chapter
0
1
Transmit Clock (TCLK) Frequency Selection
See
000
001
010
011
100
101
110
111
B
B
B
B
B
B
B
B
B
B
B
B
B
B
Chapter
, Programming of corner frequencies of DCO-R/DCO-X is done with
registers CMR3.CFAR (3:0) /CFAX(3:0), compatible to the
QuadLIU. Register bits CMR5.IAX(4:0)/CMR4.IAR(4:0) are not
valid.
, Programming of corner frequencies and attenuation factors of
DCO-R/DCO-X is done with registers CMR3.CFAR
(3:0)/CFAX(3:0) and CMR4.IAR(4:0)/CMR5.IAX(4:0) in the range
0.2 ... 20 Hz.
, DCO-R enabled (normal lock functionality).
, Soft reset of DCO-R, no lock functionality.
, DCO-X enabled (normal lock functionality).
, Soft reset of DCO-X, no lock functionality.
, 2.048 MHz.
, 8.192 MHz.
, 4.096 MHz.
, 16.384 MHz.
, 32.768 MHz.
, Reserved.
, Reserved.
, Reserved.
18.
3.7.9.
3.7.9.
Offset
xx43
3.9.2.. Note that frequencies are not in ascend ordering.
116
H
Register DescriptionClock Mode Register 6
Rev. 1.0, 2005-06-02
Chapter
PEF 22508 E
OctalLIU
Reset Value
3.7.9,
00
TM
H