PEF 22508 E V1.1-G Infineon Technologies, PEF 22508 E V1.1-G Datasheet - Page 57

• Manufacturer Part Number: PEF 22508 E V1.1-G
• Description: IC INTERFACE E1/T1/J1 LBGA-256
• Manufacturer: Infineon Technologies
• Series: OctalLIU™r

Specifications of PEF 22508 E V1.1-G

• Function: Line Interface Unit (LIU)
• Interface: E1, J1, T1
• Number Of Circuits: 8
• Voltage - Supply: 1.8V, 3.3V
• Current - Supply: 370mA
• Power (watts): 140mW
• Operating Temperature: -40°C ~ 85°C
• Mounting Type: Surface Mount
• Package / Case: 256-LSBGA
• Includes: Automatic Protection Switching, Clock Generation, Power-Down, Transmit Line Monitor, Tristate Function
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Other names: PEF22508EV1.1T; PEF22508EV11GXP; SP000029953

Figure 18
3.7.1
For data input, two different data types are supported (see also
•
•
3.7.2
In E1 applications, HDB3 line code and AMI coding is provided for the data received from the ternary interface. In
T1/J1 mode, B8ZS and AMI code is supported. Selection of the receive line code is done with register bits
MR0.RC(1:0) (MR0). In case of the optical interface the CMI Code (1T2B) with HDB3 or AMI postprocessing is
provided. If CMI code is selected the receive route clock is recovered from the data stream. The CMI decoder does
not correct any errors. The HDB3 code is used along with double violation detection or extended code violation
detection (selectable by MR0.EXZE)). In AMI code all code violations are detected. The detected errors increment
the code violation counter (16 bits length).
The signal at the ternary interface is received at both ends of a transformer.
An overview of the receive line coding is given in
3.7.3
In general the E1 line impedance operating modes with 75
twisted pair cable) line termination are selectable by switching resistors in parallel or using special transformers
with different transfer ratios in one package (using center tap). These two options both provide only one analog
front end circuitry for both transmission media types.
The OctalLIU
changes by using the integrated analog switch and two external resistors for line impedance matching, see
application example in
This allows, for example, to switch between 100 W (T1/E1 twisted pair) and 75 W (E1 coax) termination resistance
using the external resistors R
access to the register bit LIM0.RTRS (LIM0) and by hardware using the receive Multi Function Ports. For that, only
Data Sheet
Ternary coded signals received at pins RL1 and RL2 from 0 dB downto -43 dB for E1 or downto -36 dB for
T1/J1 ternary interface. The ternary interface is selected if LIM1.DRS is cleared.
Unipolar data (CMI code) on pin ROID received from an optical interface. The optical interface is selected if
LIM1.DRS is set and MR0.RC(1:0) = ´01
SYNC
Recovered clock
selection
Recovered and Receive Clock Selection
Receive Line Interface
Receive Line Coding
Receive Line Termination (Analog Switch)
TM
A
supports a software selectable generic E1/T1/J1 solution without the need for external hardware
channel 1
C
to
DCO_R
RCLK
Figure
E1
19. By default the analog switch is off.
Recovered clock
= 100
selection
A
A: controlled by CMR5.DRSS(2:0)
B: controlled by GPC(2:6).RS(2:0)
and R
channel 2
C
b
to
DCO_R
´.
RCLK
E2
= 300
Table
57
12.
, see
...
(used with coaxial cable) or with 120
Table
Table
13. The analog switch can be controlled by
12):
Recovered clock
selection
Oc talFA LC _rec _c lk _s el_2
A
channel 4
C
Functional Description
to
DCO_R
RCLK
Rev. 1.0, 2005-06-02
Receive clock
selection
PEF 22508 E
B
OctalLIU
(used with
pins
RCLK1
RCLK2
RCLK3
RCLK4
RCLK5
RCLK6
RCLK7
RCLK8
TM