MC68HC912B32MFU8 MOTOROLA [Motorola, Inc], MC68HC912B32MFU8 Datasheet - Page 105
MC68HC912B32MFU8
Manufacturer Part Number
MC68HC912B32MFU8
Description
16-Bit Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912B32MFU8.pdf
(128 pages)
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DLCSCR — Port DLC Control Register
BDLCEN — BDLC Enable
PUPDLC — BDLC Pull-Up Enable
RDPDLC — BDLC Reduced Drive
PORTDLC — Port DLC Data Register
MC68HC912B32
MC68HC912B32TS/D
Function
RESET:
RESET:
Alt. Pin
The BDLC port DLC functions as a general-purpose I/O port. BDLC functions takes precedence over
the general-purpose port when enabled. Read or write anytime.
Holds data to be driven out on port DLC pins or data received from port DLC pins.
PORTDLC can be read anytime. When configured as an input, a read will return the pin level. When
configured as output, a read will return the latched output data. Writes will not change pin state when
the pins are configured for BDLC output. Upon reset pins are configured for general-purpose high im-
pedance inputs.
0 = Configure BDLC I/O pins as general-purpose I/O pins. BDLC is off.
1 = Configure I/O pins for BDLC function. BDLC is active.
0 = Disconnects internal pull-ups from PORTDLC I/O pins.
1 = Connects internal pull-ups to PORTDLC I/O pins.
0 = Configure PORTDLC I/O pins for normal drive strength.
1 = Configure PORTDLC I/O pins for reduced drive strength.
Bit 7
Bit 7
0
0
0
0
–
Bit 6
6
0
6
–
–
0
Table 36 Offset Bit Values and Transceiver Delay
(BO3, BO2, BO1, BO0)
BARD Offset Bits
5
0
5
5
–
–
0
0101
0110
0111
1000
1001
1010
1011
1100
1101
1110
1111
4
0
4
4
–
–
0
Expected Delay ( s)
3
0
3
3
–
–
0
14
15
16
17
18
19
20
21
22
23
24
BDLCEN
2
0
2
2
–
–
PUPDLC
DLCTX
1
0
1
1
–
RDPDLC
DLCRX
Bit 0
Bit 0
Bit 0
0
–
MOTOROLA
$00FD
$00FE
105
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