MC68HC912B32MFU8 MOTOROLA [Motorola, Inc], MC68HC912B32MFU8 Datasheet - Page 113

• Manufacturer Part Number: MC68HC912B32MFU8
• Description: 16-Bit Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

ATDSTAT — ATD Status Register
ATDSTAT — ATD Status Register
SCF — Sequence Complete Flag
CC[2:0] — Conversion Counter for Current Sequence of Four or Eight Conversions
CCF[7:0] — Conversion Complete Flags
ATDTSTH — ATD Test Register
ATDTSTL — ATD Test Register
SAR[9:0] — SAR Data
MC68HC912B32
MC68HC912B32TS/D
RESET:
RESET:
RESET:
RESET:
The ATD status registers contain the flags indicating the completion of ATD conversions.
Normally, it is read-only. In special mode, the SCF bit and the CCF bits may also be written.
This bit is set at the end of the conversion sequence when in the single conversion sequence mode
(SCAN = 0 in ATDCTL5) and is set at the end of the first conversion sequence when in the continuous
conversion mode (SCAN = 1 in ATDCTL5). When AFFC = 0, SCF is cleared when a write is performed
to ATDCTL5 to initiate a new conversion sequence. When AFFC = 1, SCF is cleared after the first result
register is read.
This 3-bit value reflects the contents of the conversion counter pointer in a four or eight count sequence.
This value also reflects which result register will be written next, indicating which channel is currently
being converted.
Each of these bits are associated with an individual ATD result register. For each register, this bit is set
at the end of conversion for the associated ATD channel and remains set until that ATD result register
is read. It is cleared at that time if AFFC bit is set, regardless of whether a status register read has been
performed (i.e., a status register read is not a pre-qualifier for the clearing mechanism when AFFC = 1).
Otherwise the status register must be read to clear the flag.
The test registers control various special modes which are used during manufacturing. The test register
can be read or written only in the special modes. In the normal modes, reads of the test register return
zero and writes have no effect.
Reads of this byte return the current value in the SAR. Writes to this byte change the SAR to the value
written. Bits SAR[9:2] reflect the eight SAR bits used during the resolution process for an 8-bit result.
SAR1 and SAR0 are reserved to allow future derivatives to increase ATD resolution to ten bits.
CCF7
SAR9
SAR1
Bit 7
SCF
Bit 7
Bit 7
Bit 7
0
0
0
0
CCF6
SAR8
SAR0
6
0
0
6
0
6
0
6
0
CCF5
SAR7
RST
5
0
0
5
0
5
0
5
0
TSTOUT
CCF4
SAR6
4
0
0
4
0
4
0
4
0
CCF3
SAR5
TST3
3
0
0
3
0
3
0
3
0
CCF2
SAR4
TST2
CC2
2
0
2
0
2
0
2
0
CCF1
SAR3
TST1
CC1
1
0
1
0
1
0
1
0
CCF0
SAR2
TST0
Bit 0
CC0
Bit 0
Bit 0
Bit 0
0
0
0
0
MOTOROLA
$0066
$0067
$0068
$0069
113