MC68HC912B32MFU8 MOTOROLA [Motorola, Inc], MC68HC912B32MFU8 Datasheet - Page 87

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MC68HC912B32MFU8

Manufacturer Part Number
MC68HC912B32MFU8
Description
16-Bit Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
WAKE — Wakeup by Address Mark/Idle
ILT — Idle Line Type
PE — Parity Enable
PT — Parity Type
SC0CR2 — SCI Control Register 2
TIE — Transmit Interrupt Enable
TCIE — Transmit Complete Interrupt Enable
RIE — Receiver Interrupt Enable
ILIE — Idle Line Interrupt Enable
TE — Transmitter Enable
RE — Receiver Enable
MC68HC912B32
MC68HC912B32TS/D
RESET:
Determines which of two types of idle line detection will be used by the SCI receiver.
In the short mode, the SCI circuitry begins counting ones in the search for the idle line condition imme-
diately after the start bit. This means that the stop bit and any bits that were ones before the stop bit
could be counted in that string of ones, resulting in earlier recognition of an idle line.
In the long mode, the SCI circuitry does not begin counting ones in the search for the idle line condition
until a stop bit is received. Therefore, the last byte’s stop bit and preceding “1” bits do not affect how
quickly an idle line condition can be detected.
If parity is enabled, this bit determines even or odd parity for both the receiver and the transmitter.
Read or write anytime.
0 = Wake up by IDLE line recognition
1 = Wake up by address mark (last data bit set)
0 = Short idle line mode is enabled.
1 = Long idle line mode is detected.
0 = Parity is disabled.
1 = Parity is enabled.
0 = Even parity is selected. An even number of ones in the data character causes the parity bit to
1 = Odd parity is selected. An odd number of ones in the data character causes the parity bit to be
0 = TDRE interrupts disabled
1 = SCI interrupt will be requested whenever the TDRE status flag is set.
0 = TC interrupts disabled
1 = SCI interrupt will be requested whenever the TC status flag is set.
0 = RDRF and OR interrupts disabled
1 = SCI interrupt will be requested whenever the RDRF status flag or the OR status flag is set.
0 = IDLE interrupts disabled
1 = SCI interrupt will be requested whenever the IDLE status flag is set.
0 = Transmitter disabled
1 = SCI transmit logic is enabled and the TXD pin (port S bit 1) is dedicated to the transmitter. The
0 = Receiver disabled
1 = Enables the SCI receive circuitry
be zero and an odd number of ones causes the parity bit to be one.
zero and an even number of ones causes the parity bit to be one.
TE bit can be used to queue an idle preamble.
Bit 7
TIE
0
TCIE
6
0
RIE
5
0
ILIE
4
0
TE
3
0
RE
2
0
RWU
1
0
Bit 0
SBK
0
MOTOROLA
$00C3
87

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