MC68HC912B32MFU8 MOTOROLA [Motorola, Inc], MC68HC912B32MFU8 Datasheet - Page 74
MC68HC912B32MFU8
Manufacturer Part Number
MC68HC912B32MFU8
Description
16-Bit Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC912B32MFU8.pdf
(128 pages)
- Current page: 74 of 128
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12.1 Timer Registers
TIOS — Timer Input Capture/Output Compare Select
IOS[7:0] — Input Capture or Output Compare Channel Configuration
CFORC — Timer Compare Force Register
FOC[7:0] — Force Output Compare Action for Channel 7-0
OC7M — Output Compare 7 Mask Register
OC7D — Output Compare 7 Data Register
74
MOTOROLA
RESET:
RESET:
RESET:
RESET:
Input/output pins default to general-purpose I/O lines until an internal function which uses that pin is
specifically enabled. The timer overrides the state of the DDR to force the I/O state of each associated
port line when an output compare using a port line is enabled. In these cases the data direction bits will
have no affect on these lines.
When a pin is assigned to output an on-chip peripheral function, writing to this PORTTn bit does not
affect the pin but the data is stored in an internal latch such that if the pin becomes available for general-
purpose output the driven level will be the last value written to the PORTTn bit.
Read or write anytime.
Read anytime but will always return $00 (1 state is transient). Write anytime.
A write to this register with the corresponding data bit(s) set causes the action which is programmed for
output compare “n” to occur immediately. The action taken is the same as if a successful comparison
had just taken place with the TCn register except the interrupt flag does not get set.
Read or write anytime.
The bits of OC7M correspond bit-for-bit with the bits of timer port (PORTT). Setting the OC7Mn will set
the corresponding port to be an output port regardless of the state of the DDRTn bit when the corre-
sponding TIOSn bit is set to be an output compare. This does not change the state of the DDRT bits.
Read or write anytime.
The bits of OC7D correspond bit-for-bit with the bits of timer port (PORTT). When a successful OC7
compare occurs, for each bit that is set in OC7M, the corresponding data bit in OC7D is stored to the
corresponding bit of the timer port.
0 = The corresponding channel acts as an input capture
1 = The corresponding channel acts as an output compare.
OC7M7
OC7D7
FOC7
IOS7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
0
OC7M6
OC7D6
FOC6
IOS6
6
0
6
0
6
0
6
0
OC7M5
OC7D5
FOC5
IOS5
5
0
5
0
5
0
5
0
OC7M4
OC7D4
FOC4
IOS4
4
0
4
0
4
0
4
0
OC7M3
OC7D3
FOC3
IOS3
3
0
3
0
3
0
3
0
OC7M2
OC7D2
FOC2
IOS2
2
0
2
0
2
0
2
0
OC7M1
OC7D1
FOC1
IOS1
1
0
1
0
1
0
1
0
MC68HC912B32TS/D
OC7M0
OC7D0
FOC0
IOS0
Bit 0
Bit 0
Bit 0
Bit 0
MC68HC912B32
0
0
0
0
$0080
$0081
$0082
$0083
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