MC68HC912B32MFU8 MOTOROLA [Motorola, Inc], MC68HC912B32MFU8 Datasheet - Page 60

no-image

MC68HC912B32MFU8

Manufacturer Part Number
MC68HC912B32MFU8
Description
16-Bit Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
COPRST — Arm/Reset COP Timer Register
10.6 Clock Divider Chains
60
MOTOROLA
RESET:
Always reads $00.
Writing $55 to this address is the first step of the COP watchdog sequence.
Writing $AA to this address is the second step of the COP watchdog sequence. Other instructions may
be executed between these writes but both must be completed in the correct order prior to time-out to
avoid a watchdog reset. Writing anything other than $55 or $AA causes a COP reset to occur.
Figure 11, Figure 12, Figure 13, and Figure 14 summarize the clock divider chains for the various pe-
ripherals on the MC68HC912B32.
Bit 7
Bit 7
CR2
0
0
0
0
0
1
1
1
1
EXTAL
XTAL
CR1
0
0
1
1
0
0
1
1
6
6
0
OSCILLATOR
GENERATOR
Table 21 COP Watchdog Rates (RTBYP = 0)
CR0
CLOCK
0
1
0
1
0
1
0
1
AND
5
5
0
Figure 11 Clock Divider Chain
Divide E By:
OFF
2
2
2
2
2
2
2
13
15
17
19
21
22
23
2
4
4
0
SYSCLK
–0 to +2.048 ms
At E = 4.0 MHz
131.072 ms
524.288 ms
8.1920 ms
32.768 ms
Time-Out
2.048 ms
1.048 s
2.097 s
3
3
0
OFF
GENERATOR
E AND P CLOCK
T CLOCK
GENERATOR
2
2
0
TCLKs
ECLK
PCLK
–0 to +1.024 ms
At E = 8.0 MHz
262.144 ms
524.288 ms
1.048576 s
16.384 ms
65.536 ms
Time-Out
HC912B32 CLOCK DIV CHAIN
1.024 ms
4.096 ms
1
1
0
TO BDM,
BUSES, SPI,
ATD, SCI, TIM,
PULSE ACC,
RTI, COP,
PWM, BDLC
TO CPU
OFF
MC68HC912B32TS/D
Bit 0
Bit 0
MC68HC912B32
0
$0017

Related parts for MC68HC912B32MFU8