MC68HC912B32MFU8 MOTOROLA [Motorola, Inc], MC68HC912B32MFU8 Datasheet - Page 81

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MC68HC912B32MFU8

Manufacturer Part Number
MC68HC912B32MFU8
Description
16-Bit Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
PACNT — 16-Bit Pulse Accumulator Count Register
TIMTST — Timer Test Register
TCBYP — Timer Divider Chain Bypass
PCBYP — Pulse Accumulator Divider Chain Bypass
PORTT — Timer Port Data Register
MC68HC912B32
MC68HC912B32TS/D
RESET:
RESET:
TIMER
PA
Full count register access should take place in one clock cycle. A separate read/write for high byte and
low byte will give a different result than accessing them as a word.
Read or write anytime.
Read anytime. Write only in special mode (SMODN = 0)
PORTT can be read anytime. When configured as an input, a read will return the pin level. When con-
figured as output, a read will return the latched output data.
0 = Normal operation
1 = The 16-bit free-running timer counter is divided into two 8-bit halves and the prescaler is by-
0 = Normal operation
1 = The 16-bit pulse accumulator counter is divided into two 8-bit halves and the prescaler is by-
passed. The clock drives both halves directly.
passed. The clock drives both halves directly.
Bit 15
I/OC7
Bit 7
Bit 7
Bit 7
Bit 7
PT7
PAI
0
0
0
Writes do not change pin state when the pin is configured for timer output. The min-
imum pulse width for pulse accumulator input should always be greater than two
module clocks due to input synchronizer circuitry. The minimum pulse width for the
input capture should always be greater than the width of two module clocks due to
input synchronizer circuitry.
I/OC6
PT6
14
6
6
0
6
0
0
6
I/OC5
PT5
13
5
5
0
5
0
0
5
I/OC4
PT4
12
4
4
0
4
0
0
4
NOTE
I/OC3
PT3
11
3
3
0
3
0
0
3
I/OC2
PT2
10
2
2
0
2
0
0
2
TCBYP
I/OC1
PT1
1
9
1
0
1
0
1
PCBYP
I/OC0
Bit 0
Bit 8
Bit 0
Bit 0
Bit 0
PT0
0
0
$00A2–$00A3
MOTOROLA
$00AD
$00AE
81

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