MC68HC912B32MFU8 MOTOROLA [Motorola, Inc], MC68HC912B32MFU8 Datasheet - Page 38

• Manufacturer Part Number: MC68HC912B32MFU8
• Description: 16-Bit Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

FEEMCR — Flash EEPROM Module Configuration Register
BOOTP — Boot Protect
FEETST — Flash EEPROM Module Test Register
FSTE — Stress Test Enable
GADR — Gate/Drain Stress Test Select
HVT — Stress Test High Voltage Status
FENLV — Enable Low Voltage
FDISVFP — Disable Status V
VTCK — V
38
MOTOROLA
RESET:
RESET:
This register controls the operation of the Flash EEPROM array. BOOTP cannot be changed when the
LOCK control bit in the FEELCK register is set or if ENPE in the FEECTL register is set.
The boot block is located at $7800–$7FFF or $F800–$FFFF depending upon the mapped location of
the Flash EEPROM array and mask set ($7C00–$7FFF or $FC00–$FFFF for 1-Kbyte block).
In normal mode, writes to FEETST control bits have no effect and always read zero. The Flash
EEPROM module cannot be placed in test mode inadvertently during normal operation.
When the V
LAT bit; the user cannot erase or program the Flash module. The FDISVFP control bit enables writing
to the LAT bit regardless of the voltage on the V
When VTCK is set, the Flash EEPROM module uses the V
sense amp time-out path is disabled. This allows for indirect measurements of the bit cells program and
erase threshold. If V
If V
FP
0 = Enable erase and program of 1-Kbyte or 2-Kbyte boot block
1 = Disable erase and program of 1-Kbyte or 2-Kbyte boot block
0 = Disables the gate/drain stress circuitry
1 = Enables the gate/drain stress circuitry
0 = Selects the drain stress circuitry
1 = Selects the gate stress circuitry
0 = High voltage not present during stress test
1 = High voltage present during stress test
0 = Disables low voltage transistor in current reference circuit
1 = Enables low voltage transistor in current reference circuit
0 = Enable the automatic lock mechanism if V
1 = Disable the automatic lock mechanism if V
0 = V
1 = V
> V
T
Check Test Enable
FSTE
T
T
Bit 7
Bit 7
ZBRK
0
0
0
test disable
test enable
FP
pin is below normal programming voltage the Flash module will not allow writing to the
the control gate will be regulated by the following equation:
Vcontrol gate = V
GADR
FP
6
0
0
6
0
< V
FP
ZBRK
Voltage Lock
HVT
(breakdown voltage) the control gate will equal the V
5
0
0
5
0
ZBRK
FENLV
0.44
4
0
0
4
0
(V
FP
FDISVFP
FP
FP
FP
pin.
is low
is low
3
0
0
3
0
V
ZBRK
FP
pin to control the control gate voltage; the
)
VTCK
2
0
0
2
0
STRE
1
0
0
1
0
MC68HC912B32TS/D
BOOTP
MWPR
Bit 0
Bit 0
FP
MC68HC912B32
1
0
voltage.
$00F5
$00F6