MC68HC912B32MFU8 MOTOROLA [Motorola, Inc], MC68HC912B32MFU8 Datasheet - Page 34

• Manufacturer Part Number: MC68HC912B32MFU8
• Description: 16-Bit Microcontroller
• Manufacturer: MOTOROLA [Motorola, Inc]

PORTE — Port E Register
DDRE — Port E Data Direction Register
34
Single Chip
PEAR — Port E Assignment Register
MOTOROLA
RESET:
RESET:
RESET:
RESET:
RESET:
Function
RESET:
RESET:
Alt. Pin
This register is associated with external bus control signals and interrupt inputs including data bus en-
able (DBE), mode select (MODB/IPIPE1, MODA/IPIPE0), E clock, data size (LSTRB/TAGLO), read/
write (R/W), IRQ, and XIRQ. When the associated pin is not used for one of these specific functions,
the pin can be used as general-purpose I/O. The port E assignment register (PEAR) selects the function
of each pin. DDRE determines the primary direction of each port E pin when configured to be general-
purpose I/O.
Some of these pins have software selectable pull-ups (DBE, LSTRB, R/W, and XIRQ). A single control
bit enables the pull-ups for all these pins which are configured as inputs. IRQ always has a pull-up.
This register is not in the map in peripheral mode or expanded modes when the EME bit is set.
Read and write anytime.
This register determines the primary direction for each port E pin configured as general-purpose I/O.
PE[1:0] are associated with XIRQ and IRQ and cannot be configured as outputs. These pins can be
read regardless of whether the alternate interrupt functions are enabled.
This register is not in the map in peripheral mode and expanded modes while the EME control bit is set.
Read and write anytime.
The PEAR register is used to choose between the general-purpose I/O functions and the alternate bus
control functions of port E. When an alternate control function is selected, the associated DDRE bits are
overridden.
The reset condition of this register depends on the mode of operation because bus-control signals are
needed immediately after reset in some modes.
In normal single-chip mode, no external bus control signals are needed so all of port E is configured for
general-purpose I/O.
0 = Associated pin is a high-impedance input
1 = Associated pin is an output
NDBE
Bit 7
DDE7
Bit 7
0
0
1
1
0
Bit 7
DBE
PE7
0
–
MODB or
IPIPE1
DDE6
6
0
–
–
–
–
–
PE6
6
0
6
–
PIPOE
MODA or
IPIPE0
DDE5
5
0
1
0
0
1
PE5
5
0
5
–
NECLK
DDE4
ECLK
4
0
0
1
1
0
PE4
4
0
4
–
LSTRE
LSTRB or
TAGLO
DDE3
3
0
1
0
0
1
PE3
3
0
3
–
RDWE
DDE2
2
0
1
0
0
1
R/W
PE2
2
0
2
–
1
0
–
–
–
–
–
PE1
IRQ
1
0
–
1
–
MC68HC912B32TS/D
Bit 0
XIRQ
Bit 0
0
–
–
–
–
–
Bit 0
PE0
MC68HC912B32
0
–
–
Single Chip
Single Chip
Peripheral
Expanded
Expanded
Special
Special
Normal
Normal
$0008
$000A
$0009