MC68HC912B32MFU8 MOTOROLA [Motorola, Inc], MC68HC912B32MFU8 Datasheet - Page 117

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MC68HC912B32MFU8

Manufacturer Part Number
MC68HC912B32MFU8
Description
16-Bit Microcontroller
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
MC68HC912B32
MC68HC912B32TS/D
TRANSMIT 1
(TARGET MCU)
TRANSMIT 0
OF BIT TIME
PERCEIVED
BKGD PIN
BKGD PIN
SPEEDUP PULSE
DRIVE TO
E CLOCK
(TARGET
Figure 28 shows the host receiving a logic one from the target MC68HC912B32 MCU. Since the host
is asynchronous to the target MCU, there is a 0-to-1 cycle delay from the host-generated falling edge
on BKGD to the perceived start of the bit time in the target MCU. The host holds the BKGD pin low long
enough for the target to recognize it (at least two target E cycles). The host must release the low drive
before the target MCU drives a brief active-high speed-up pulse seven cycles after the perceived start
of the bit time. The host should sample the bit level about ten cycles after it started the bit time.
E CLOCK
HOST
TARGET MCU
HOST
START
MCU)
HOST
START OF BIT
PERCEIVED
SYNCHRONIZATION
UNCERTAINTY
TIME
Figure 28 BDM Target to Host Serial Bit Timing (Logic 1)
HIGH-IMPEDANCE
Figure 27 BDM Host to Target Serial Bit Timing
10 CYCLES
R-C RISE
9 CYCLES
10 CYCLES
TARGET SENSES BIT
HIGH-IMPEDANCE
HOST SAMPLES
BKGD PIN
HIGH-IMPEDANCE
HC12A4 BDM TARGET TO HOST TIM 1
HC12A4 BDM HOST TO TARGET TIM
MOTOROLA
EARLIEST
START OF
EARLIEST
START OF
NEXT BIT
NEXT BIT
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