LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 228

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
Table 204. USB Endpoint Interrupt Enable register (USBEpIntEn - address 0x5000 C234) bit description
Table 205. USB Endpoint Interrupt Clear register (USBEpIntClr - address 0x5000 C238) bit allocation
Reset value: 0x0000 0000
Table 206. USB Endpoint Interrupt Clear register (USBEpIntClr - address 0x5000 C238) bit description
UM10360
User manual
Bit
31:0
Bit
31:0
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Bit
Symbol
Symbol
See USBEpIntEn bit
allocation table above
Symbol
See USBEpIntClr bit
allocation table above
11.10.3.3 USB Endpoint Interrupt Clear register (USBEpIntClr - 0x5000 C238)
EP15TX
EP11TX
EP3TX
EP7TX
EP3TX
31
23
15
7
7
Writing a one to this a bit in this register causes the SIE Select Endpoint/Clear Interrupt
command to be executed
zero has no effect. Before executing the Select Endpoint/Clear Interrupt command, the
CDFULL bit in USBDevIntSt is cleared by hardware. On completion of the command, the
CDFULL bit is set, USBCmdData contains the status of the endpoint, and the
corresponding bit in USBEpIntSt is cleared.
Notes:
Each physical endpoint has its own reserved bit in this register. The bit field definition is
the same as that of USBEpIntSt shown in
•
•
•
When clearing interrupts using USBEpIntClr, software should wait for CDFULL to be
set to ensure the corresponding interrupt has been cleared before proceeding.
While setting multiple bits in USBEpIntClr simultaneously is possible, it is not
recommended; only the status of the endpoint corresponding to the least significant
interrupt bit cleared will be available at the end of the operation.
Alternatively, the SIE Select Endpoint/Clear Interrupt command can be directly
invoked using the SIE command registers, but using USBEpIntClr is recommended
because of its ease of use.
EP15RX
EP11RX
EP3RX
EP7RX
EP3RX
Value
0
1
Value
0
1
30
22
14
6
6
Description
The corresponding bit in USBDMARSt is set when an interrupt occurs
for this endpoint.
The corresponding bit in USBEpIntSt is set when an interrupt
occurs for this endpoint.
Description
No effect.
Clears the corresponding bit in USBEpIntSt, by executing the SIE
Select Endpoint/Clear Interrupt command for this endpoint.
All information provided in this document is subject to legal disclaimers.
EP14TX
EP10TX
EP2TX
EP6TX
EP2TX
29
21
13
5
5
Rev. 2 — 19 August 2010
(Table
EP14RX
EP10RX
EP2RX
EP6RX
EP2RX
28
20
12
4
248) for the corresponding physical endpoint. Writing
4
Implies Slave mode for this endpoint.
Table
EP13TX
EP9TX
EP1TX
EP5TX
EP1TX
Chapter 11: LPC17xx USB device controller
27
19
11
3
3
201. USBEpIntClr is a write-only register.
EP13RX
EP1RX
EP9RX
EP5RX
EP1RX
26
18
10
2
2
EP12TX
EP0TX
EP8TX
EP4TX
EP0TX
25
17
UM10360
1
9
1
© NXP B.V. 2010. All rights reserved.
Reset value
0
Reset value
0
EP12RX
EP0RX
EP8RX
EP4RX
EP0RX
228 of 840
24
16
0
8
0