LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 505

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
23.5 Register description
Table 438. System Tick Timer register map
[1]
Table 439. System Timer Control and status register (STCTRL - 0xE000 E010) bit description
UM10360
User manual
Name
STCTRL
STRELOAD
STCURR
STCALIB
Bit
0
1
2
Reset Value reflects the data stored in used bits only. It does not include content of reserved bits.
Symbol
ENABLE
TICKINT
CLKSOURCE
23.5.1 System Timer Control and status register (STCTRL - 0xE000 E010)
Description
System Timer Control and status register
System Timer Reload value register
System Timer Current value register
System Timer Calibration value register
The STCTRL register contains control information for the System Tick Timer, and provides
a status flag.
Fig 118. System Tick Timer block diagram
Description
System Tick counter enable. When 1, the counter is enabled. When 0,
the counter is disabled.
System Tick interrupt enable. When 1, the System Tick interrupt is
enabled. When 0, the System Tick interrupt is disabled. When enabled,
the interrupt is generated when the System Tick counter counts down to
0.
System Tick clock source selection. When 1, the CPU clock is selected.
When 0, the external clock pin (STCLK) is selected.
cclk
STCLK pin
All information provided in this document is subject to legal disclaimers.
D
Rev. 2 — 19 August 2010
Q
CLKSOURCE
COUNTFLAG
clock
24-bit down counter
load
Access
R/W
R/W
R/W
R/W
Chapter 23: LPC17xx System Tick Timer
STRELOAD
STCALIB
STCURR
STCTRL
load data
under-
flow
TICKINT
enable
0x4
0
0
0x000F 423F
Reset value
count
ENABLE
System Tick
[1]
interrupt
UM10360
peripheral
Address
0xE000 E010
0xE000 E014
0xE000 E018
0xE000 E01C
© NXP B.V. 2010. All rights reserved.
private
bus
Reset value
0
0
1
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