LPC1759FBD80,551 NXP Semiconductors, LPC1759FBD80,551 Datasheet - Page 819

• Manufacturer Part Number: LPC1759FBD80,551
• Description: IC ARM CORTEX MCU 512K 80-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1759FBD80,551

• Program Memory Type: FLASH
• Program Memory Size: 512KB (512K x 8)
• Package / Case: 80-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 120MHz
• Connectivity: CAN, I²C, IrDA, Microwire, SPI, SSI, SSP, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, DMA, I²S, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 52
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 6x12b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: Ethernet, USB, OTG, CAN
• Maximum Clock Frequency: 120 MHz
• Number Of Programmable I/os: 52
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 6 Channel
• On-chip Dac: 10 bit
• Package: 80LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC17xx
• Maximum Speed: 120 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4968; 935290523551

NXP Semiconductors
6.5.14
6.5.15
6.5.16
6.5.17
Chapter 7: LPC17xx Pin configuration
7.1
Chapter 8: LPC17xx Pin connect block
8.1
8.2
8.3
8.4
8.5
8.5.1
8.5.2
8.5.3
8.5.4
8.5.5
8.5.6
8.5.7
8.5.8
Chapter 9: LPC17xx General Purpose Input/Output (GPIO)
9.1
9.2
9.2.1
9.2.2
9.3
9.4
9.5
UM10360
User manual
LPC17xx pin configuration . . . . . . . . . . . . . . . 91
How to read this chapter . . . . . . . . . . . . . . . . 104
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . 104
Pin function select register values. . . . . . . . 104
Pin mode select register values . . . . . . . . . . 105
Register description . . . . . . . . . . . . . . . . . . . 107
Basic configuration . . . . . . . . . . . . . . . . . . . . 120
Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . 121
Pin description . . . . . . . . . . . . . . . . . . . . . . . . 121
Register description . . . . . . . . . . . . . . . . . . . 122
Interrupt Priority Register 3 (IPR3 - 0xE000
E40C) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Interrupt Priority Register 4 (IPR4 - 0xE000
E410) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Interrupt Priority Register 5 (IPR5 - 0xE000
E414) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 88
Interrupt Priority Register 6 (IPR6 - 0xE000
E418) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Multiple connections . . . . . . . . . . . . . . . . . . . .105
Function of PINMODE in open drain mode . .106
Pin control module register reset values. . . . .107
Pin Function Select register 0 (PINSEL0 -
0x4002 C000) . . . . . . . . . . . . . . . . . . . . . . . . 108
Pin Function Select Register 1 (PINSEL1 -
0x4002 C004) . . . . . . . . . . . . . . . . . . . . . . . . 108
Pin Function Select register 2 (PINSEL2 -
0x4002 C008) . . . . . . . . . . . . . . . . . . . . . . . . 109
Pin Function Select Register 3 (PINSEL3 -
0x4002 C00C) . . . . . . . . . . . . . . . . . . . . . . . 109
Pin Function Select Register 4 (PINSEL4 -
0x4002 C010) . . . . . . . . . . . . . . . . . . . . . . . . 110
Pin Function Select Register 7 (PINSEL7 -
0x4002 C01C) . . . . . . . . . . . . . . . . . . . . . . . 111
Pin Function Select Register 9 (PINSEL9 -
0x4002 C024) . . . . . . . . . . . . . . . . . . . . . . . . 111
Pin Function Select Register 10 (PINSEL10 -
0x4002 C028) . . . . . . . . . . . . . . . . . . . . . . . . 111
Digital I/O ports . . . . . . . . . . . . . . . . . . . . . . . 120
Interrupt generating digital ports . . . . . . . . . . 120
All information provided in this document is subject to legal disclaimers.
Rev. 2 — 19 August 2010
6.5.18
6.5.19
6.5.20
7.1.1
8.5.9
8.5.10
8.5.11
8.5.12
8.5.13
8.5.14
8.5.15
8.5.16
8.5.17
8.5.18
8.5.19
8.5.20
8.5.21
9.5.1
9.5.2
9.5.3
Interrupt Priority Register 7 (IPR7 - 0xE000
E41C). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Interrupt Priority Register 8 (IPR8 - 0xE000
E420) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89
Software Trigger Interrupt Register (STIR -
0xE000 EF00) . . . . . . . . . . . . . . . . . . . . . . . . 90
LPC17xx pin description . . . . . . . . . . . . . . . . 94
Pin Mode select register 0 (PINMODE0 -
0x4002 C040) . . . . . . . . . . . . . . . . . . . . . . . . 112
Pin Mode select register 1 (PINMODE1 -
0x4002 C044) . . . . . . . . . . . . . . . . . . . . . . . . 112
Pin Mode select register 2 (PINMODE2 -
0x4002 C048) . . . . . . . . . . . . . . . . . . . . . . . . 113
Pin Mode select register 3 (PINMODE3 -
0x4002 C04C) . . . . . . . . . . . . . . . . . . . . . . . . 113
Pin Mode select register 4 (PINMODE4 -
0x4002 C050) . . . . . . . . . . . . . . . . . . . . . . . . 114
Pin Mode select register 7 (PINMODE7 -
0x4002 C05C) . . . . . . . . . . . . . . . . . . . . . . . . 115
Pin Mode select register 9 (PINMODE9 -
0x4002 C064) . . . . . . . . . . . . . . . . . . . . . . . . 115
Open Drain Pin Mode select register 0
(PINMODE_OD0 - 0x4002 C068) . . . . . . . . . 115
Open Drain Pin Mode select register 1
(PINMODE_OD1 - 0x4002 C06C) . . . . . . . . . 116
Open Drain Pin Mode select register 2
(PINMODE_OD2 - 0x4002 C070) . . . . . . . . . 117
Open Drain Pin Mode select register 3
(PINMODE_OD3 - 0x4002 C074) . . . . . . . . . 118
Open Drain Pin Mode select register 4
(PINMODE_OD4 - 0x4002 C078) . . . . . . . . . 118
I
0x4002 C07C) . . . . . . . . . . . . . . . . . . . . . . . . 119
GPIO port Direction register FIOxDIR (FIO0DIR to
FIO4DIR- 0x2009 C000 to 0x2009 C080) . . 123
GPIO port output Set register FIOxSET (FIO0SET
to FIO4SET - 0x2009 C018 to 0x2009 C098) 124
GPIO port output Clear register FIOxCLR
(FIO0CLR to FIO4CLR- 0x2009 C01C to 0x2009
C09C). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
2
C Pin Configuration register (I2CPADCFG -
Chapter 35: Supplementary information
UM10360
© NXP B.V. 2010. All rights reserved.
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