MCHC908JW32FAE Freescale Semiconductor, MCHC908JW32FAE Datasheet - Page 156

• Manufacturer Part Number: MCHC908JW32FAE
• Description: IC MCU 32K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MCHC908JW32FAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SPI, USB
• Peripherals: LED, LVD, POR, PWM
• Number Of I /o: 29
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 3.5 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 48
• Ram Memory Size: 1KB
• Cpu Speed: 8MHz
• No. Of Timers: 1
• Embedded Interface Type: SPI
• Rohs Compliant: Yes
• Processor Series: HC08JW
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1 KB
• Interface Type: SPI, USB
• Number Of Programmable I/os: 29
• Number Of Timers: 2
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68EML08GZE, KITUSBSPIDGLEVME, KITUSBSPIEVME, KIT33810EKEVME
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

USB 2.0 FS Module
11.5.2 USB Status Register (USBSR)
CONFIG — Configuration Number
SETUP — SETUP Request Received
SOF — Start of Frame Detection Flag
CONFIG_CHG — Change of Configuration Detection Flag
USBRST — USB Reset Detection Flag
RESUMEF — RESUME Detection Flag
156
This read-only bit specify the configuration number returned from the USB host. The module only
supports a single configuration setting.
This read/write bit indicates a valid GET_DESCRIPTOR command, SYNC_FRAME command or
class/vendor specific request is detected. This bit only set when the packet is received without
CRC/Token/EOP error. When this is set, user must read and decode the request from the endpoint 0
data registers (UE0D7-0). Writing zero to clear the bit. Writing one to the bit has no effect. Reset clears
this bit.
This read/write bit indicates a start-of-frame signal is detected from the USB data line. Writing zero to
clear the bit. Writing one to the bit has no effect. Reset clears this bit.
This read/write bit indicates a change of device configuration request is received from the host. This
bit will be set when new configuration is requested and accepted by the host. Writing zero to clear the
bit. Writing one to the bit has no effect. Reset clears this bit.
This read/write bit is set when a valid reset signal state is detected on the D+ and D- lines. If URSTD
bit of the configuration register (CONFIG) is clear, this reset detection flag will generate a MCU internal
reset signal to reset the CPU and its peripheral. Otherwise, if URSTD is set, a interrupt request will be
generated instead. Writing zero to clear the bit. Writing one to the bit has no effect. Reset clears this bit.
This read/write bit is set when bus activity is detected while the device is in SUSPEND mode. Writing
zero to clear the bit. Writing one to the bit has no effect. Reset clears this bit.
1 = Device configure to configuration number 1
0 = Device is unconfigured
1 = GET_DESCRIPTOR, SYNC_FRAME or Class/vendor specific requests received
0 = No vendor specific request received
1 = Start-of-frame is detected
0 = No start-of-frame is detected
1 = A change of configuration request is received
0 = No change of configuration request is received
1 = USB reset signal is detected
0 = No USB reset signal is detected
1 = USB bus activity is detected while the device is in SUSPEND mode
0 = No USB bus activity is detected
Address:
Reset:
Read:
Write:
CONFIG
$0052
Bit 7
0
= Unimplemented
6
0
Figure 11-4. USB Status Register
MC68HC908JW32 Data Sheet, Rev. 6
SETUP
5
0
SOF
4
0
CONFIG_
CHG
3
0
USBRST
2
0
RESUMEF
1
0
Freescale Semiconductor
SUSPND
Bit 0
0